I have esp32 as Wi-Fi system for an stm32f4 system.
I would like to be able to update the esp from the stm32 via uart or spi. Is there any sample code how to do it?. I can use factory uart bootloader but need the stm side in c. Is there any such example code?
Thanks
Boot load for stm32
Re: Boot load for stm32
There isn't any example available for interfacing with the ROM bootloader of the ESP32 from STM. A simpler option (if you control the firmware of the ESP32) would be to implement your own UART update protocol. On the ESP32 side, you can use UART driver and esp_ota APIs. See system/ota/native_ota_example example. This example downloads the firmware from a remote server, but same APIs can be just as well used to implement OTA over UART or over SPI.
Re: Boot load for stm32
Hi,
We have a similar setup and have ported the relevant parts of esptool to STM C/C++.
I will check with commercial to see if we can make this project open.
I would agree that your own protocol is probably easier. Just make sure that your ESP side will not allow you to write to the factory partition!
How did you get on with the hardware side? I would be quite interested in your circuit.
We also have wired Ethernet on the ESP using a LAN8710A. We have both the STM and a USB/TTL debug cable connected to the ESP TX/RX and we have problems with the RIO0/50MHz clock. The PHY initialisation times out with status registers FFFF. Probably clock not getting through.
We have a similar setup and have ported the relevant parts of esptool to STM C/C++.
I will check with commercial to see if we can make this project open.
I would agree that your own protocol is probably easier. Just make sure that your ESP side will not allow you to write to the factory partition!
How did you get on with the hardware side? I would be quite interested in your circuit.
We also have wired Ethernet on the ESP using a LAN8710A. We have both the STM and a USB/TTL debug cable connected to the ESP TX/RX and we have problems with the RIO0/50MHz clock. The PHY initialisation times out with status registers FFFF. Probably clock not getting through.
& I also believe that IDF CAN should be fixed.
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