The project has the following settings xclk_freq_hz = 20000000 Camera clock frequency in .ino files.
But further in the library(ov264_drive.c) this frequency decreases for SVGA clkrc=0x83 means to divide by four with
internal frequency divider that is inside the camera(PLL).It turns out that the camera clocks 5 MHz for SVGA.
I use the same type of camera with only one difference.The camera is clocked by its own 12 MHz generator
- 0v2640.jpg (61.97 KiB) Viewed 3031 times
Wires between the board and the camera are shorter than 2 centimeters.
I tried to change the clocking settings of the camera 12/2(clkrc=0x81) or 12/3(clkrc=0x82)but it does not give good results.
it looks like 12s is also set to 20Mhz in camera.c
// Configure clock divider
I2S0.clkm_conf.clkm_div_a = 1;
I2S0.clkm_conf.clkm_div_b = 0;
I2S0.clkm_conf.clkm_div_num = 2;
I have done some experiments with the original board TTGO T-Journal.
1.xclk_freq_hz = 10000000
2.(clkrc=0x81)for SVGA
and it works almost good.
Should my camera with an internal generator work with some changes in the project?
If not, why not?
I do not want to unsolder the generator on the board
.