ROM bootloader and padding sections

[gautier.s]

Hi,

I tried to make the ROM bootloader to load an image consisting of RAM and flash segments.

I can successfully generate a .elf.

esptool.py elf2image is also keen to generate the .bin file.

esptool.py image_info lists the segments present in the .bin file:

Code: Select all

esptool.py v2.3.1
Image version: 1
Entry point: 40080440
11 segments
Segment 1: len 0x00168 load 0x3ffb0000 file_offs 0x00000018
Segment 2: len 0x00060 load 0x3ffb2ff0 file_offs 0x00000188
Segment 3: len 0x00400 load 0x40080000 file_offs 0x000001f0
Segment 4: len 0x00158 load 0x40080400 file_offs 0x000005f8
Segment 5: len 0x00000 load 0x400c0000 file_offs 0x00000758
Segment 6: len 0x0f8a8 load 0x00000000 file_offs 0x00000760
Segment 7: len 0x0ffe8 load 0x3f400018 file_offs 0x00010010
Segment 8: len 0x0fff0 load 0x00000000 file_offs 0x00020000
Segment 9: len 0x00060 load 0x3f410000 file_offs 0x0002fff8
Segment 10: len 0x0ffa8 load 0x00000000 file_offs 0x00030060
Segment 11: len 0x02d24 load 0x400d0018 file_offs 0x00040010
Checksum: d5 (valid)
Validation Hash: 6d8475908b4510f36f6fc61e5895483063c15cfe26e09c98b3449965a8f9cf87 (valid)

Note that segments 6, 8, and 10 are padding segments.
These padding segments are added by esptool.py here

This .bin file is flashed with success.

The bootloader can load the first 5 segments, but fails to load the 6th one, and then the chip reboots.

Code: Select all

ets Jun  8 2016 00:22:57

rst:0x10 (RTCWDT_RTC_RESET),boot:0x3e (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3ffb0000,len:360
load:0x3ffb2ff0,len:96
load:0x40080000,len:1024
load:0x40080400,len:344
load:0x400c0000,len:0
load:0x00000000,len:63656

I understand the bootloader tries to load the 6th segment (padding, plain zeroes) to address zero.

Is my understanding correct? Is there a way to tell the ROM bootloader to not do that?

thanks in advance,
cheers,
gautier

[ESP_Angus]

Hi Gautier,

You're right that the ROM bootloader is not aware of padding segments. The second stage (software) bootloader in ESP-IDF is aware of these.

The ROM bootloader also doesn't know how to enable or configure the flash cache for an app, so any segments which are "loaded" to flash cache addresses (rather than IRAM addresses) will not behave as expected. This is one of the reasons why we have the ESP-IDF software bootloader (rather than booting directly into an app).


Angus