New "Peripheral Pin Assignment" Section Added to the ESP32-C3 Datasheet – We Value Your Feedback!

[ESP_wangning]

Hello everyone,

We’re excited to announce that the ESP32-C3 Datasheet has been updated with a brand-new section titled "Peripheral Pin Assignment". This section has been introduced to provide a clear and structured overview of the pins that can be assigned to each peripheral interface, categorized by priorities.

What’s New?

• Clear priority-based pin assignments:
  Priority 1: Fixed IO MUX or LP IO MUX pins directly connected to peripheral signals.
  Priority 2: GPIO Matrix pins without restrictions.
  Priority 3: GPIO Matrix pins with critical functions (e.g., JTAG, UART, strapping pins, etc.).
  Priority 4: GPIO Matrix pins allocated for off-package flash.

• Detailed Notes if a peripheral supports IO MUX only, GPIO Matrix only, or both

• Tables for quick reference

Why This Update?
This new section is designed to help:

• Quickly understand which pins can be assigned to specific peripheral interfaces.

• Learn about restrictions and limitations for certain GPIOs.

• Learn if the pins might be occupied by other peripheral interfaces.

We would love to hear your feedback on this new section! Is the information easy to understand and apply? Are there any areas that need clarification or additional details?

Based on your feedback, we will add this new section to other datasheets.

Thank you!

peripheral-pin-assign-descr.png (174.52 KiB) Viewed 546 times

peripheral-pin-assign-table.png (145.47 KiB) Viewed 546 times