SPI Master DMA transmission requierement: one byte at a time with gaps

[The_Praiodanish]

Hi all,

working on a new project I encountered a problem where I'm not sure whether it can be solved without additional hardware or not.

Using an ESP32 with the arduino framework, I realized an UDP multicast receiver. Its job is to receive a multicast transport stream at a rate of approx. 5 Mbit which hast to be sent to another module using SPI.

The SPI receiver hast the following requirements:
The data is clocked in a byte at a time at a bit rate of 26.6 MHz ('one byte bursts') then the clock hast to
stop until the next byte is available. The absolute rate of this clock
is not vital, but the timing requirements must be met. +/- 10% tolerance is
available on this clock rate,
The byte rate is equal to the transport stream rate.
Eg. Transport stream rate is 2.4Mb/s, the byte rate is 300KHz
The clock gap period is proportional to the transport stream rate. Therefore if
the MPEG transport stream rate was 26.6MBit/s then the clock would become
continuous.


Currently I receive UDP frames 1316 bytes each which are copied into a DMA buffer. This works great but the receiving module only has a one byte FIFO on its input and requires playout of the SPI data bytes with the bitrate of the source so I need gaps in between each byte but by now all 1316 bytes are output at once which leads to a input buffer overflow at the receiver.

Is there any way to 'gate' the SPI master transmitter by an additional enable signal to trigger transmission of only one byte per trigger pulse? Something like a CS INPUT for master transmission mode?

Thanks in advance!

[fnoguez]

Hi The_Praiodanish
Is DMA for sending necesary?
If not, try sending without DMA.

Regards