【求助】外部32.768K晶振无法起振问题

dodo55
Posts: 41
Joined: Fri Nov 19, 2021 10:01 am

【求助】外部32.768K晶振无法起振问题

Postby dodo55 » Fri Dec 17, 2021 9:03 am

为了验证我的板子上的32.768K晶振是否有问题,我特地买了块ESP-WROVER-KIT开发板来验证,因为只有这个开发板上配置有外部32.768K的晶振。

首先我使用了ESP-WROVER-KIT配套的例程:“examples\peripherals\spi_master\lcd”,然后sdkconfig->Component config->ESP32-specific->RTC clock source->External 32kHz crystal,然后Additional current for external 32kHz crystal中三个选项都试过,如下图:
RTC.png
RTC.png (81.13 KiB) Viewed 11128 times
依然无法使32.768K起振,上电信息如下:

Code: Select all

ets Jul 29 2019 12:21:46

rst:0x1 (POWERON_RESET),boot:0x1e (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:6708
load:0x40078000,len:15340
load:0x40080400,len:3808
entry 0x40080694
I (27) boot: ESP-IDF v4.4-beta1 2nd stage bootloader
I (27) boot: compile time 16:29:13
I (28) boot: chip revision: 3
I (30) boot_comm: chip revision: 3, min. bootloader chip revision: 0
I (37) boot.esp32: SPI Speed      : 40MHz
I (42) boot.esp32: SPI Mode       : DIO
I (47) boot.esp32: SPI Flash Size : 2MB
I (51) boot: Enabling RNG early entropy source...
I (56) boot: Partition Table:
I (60) boot: ## Label            Usage          Type ST Offset   Length
I (67) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (75) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (82) boot:  2 factory          factory app      00 00 00010000 00100000
I (90) boot: End of partition table
I (94) boot_comm: chip revision: 3, min. application chip revision: 0
I (101) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=19bbch (105404) map
I (148) esp_image: segment 1: paddr=00029be4 vaddr=3ffb0000 size=02784h ( 10116) load
I (152) esp_image: segment 2: paddr=0002c370 vaddr=40080000 size=03ca8h ( 15528) load
I (160) esp_image: segment 3: paddr=00030020 vaddr=400d0020 size=18f14h (102164) map
I (199) esp_image: segment 4: paddr=00048f3c vaddr=40083ca8 size=08fe4h ( 36836) load
I (214) esp_image: segment 5: paddr=00051f28 vaddr=50000000 size=00010h (    16) load
I (221) boot: Loaded app from partition at offset 0x10000
I (221) boot: Disabling RNG early entropy source...
I (235) cpu_start: Pro cpu up.
I (235) cpu_start: Starting app cpu, entry point is 0x400810f0
I (0) cpu_start: App cpu up.
W (397) clk: 32 kHz XTAL not found, switching to internal 150 kHz oscillator
I (405) cpu_start: Pro cpu start user code
I (405) cpu_start: cpu freq: 160000000
I (405) cpu_start: Application information:
I (409) cpu_start: Project name:     spi_master
I (415) cpu_start: App version:      1
I (419) cpu_start: Compile time:     Dec 17 2021 16:29:05
I (425) cpu_start: ELF file SHA256:  985b0254728d80f3...
I (431) cpu_start: ESP-IDF:          v4.4-beta1
I (437) heap_init: Initializing. RAM available for dynamic allocation:
I (444) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (450) heap_init: At 3FFB35E8 len 0002CA18 (178 KiB): DRAM
I (456) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (462) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (469) heap_init: At 4008CC8C len 00013374 (76 KiB): IRAM
I (476) spi_flash: detected chip: generic
I (480) spi_flash: flash io: dio
W (484) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (498) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
LCD ID: 00000000
ILI9341 detected.
LCD ILI9341 initialization.
由开机信息W (397) clk: 32 kHz XTAL not found, switching to internal 150 kHz oscillator
可以得知没能起振,然后通过示波器查看晶振两个管脚均没有波形产生,只有在上电的过程中有5个30.86K频率的方波。

请问,要使用这外部32.768K的晶振,sdkconfig或者代码里还有哪些配置要设置的吗???
各位坛友,有用过的指导一下呗。
还有esp-idf中哪个examples是与这32.768K晶振或者RTC相关的?我都翻遍了,没找着。

ESP_ICY
Posts: 404
Joined: Mon Aug 23, 2021 11:10 am

Re: 【求助】外部32.768K晶振无法起振问题

Postby ESP_ICY » Fri Dec 17, 2021 12:49 pm

我这边测试例程的话晶振是可以正常工作的,你这边用的是什么版本的idf?例程并没有特别用到外部晶振的,只要你在menuconfig配置里修改 RTC clock source 就可以了

ESP_LJH
Posts: 387
Joined: Tue May 18, 2021 9:21 am

Re: 【求助】外部32.768K晶振无法起振问题

Postby ESP_LJH » Fri Dec 17, 2021 1:14 pm

您好,WROVER-KIT 你最好查下上件的模组是不是 WROVER-E,如果是,请在晶振上跨接一个 10 M 的电阻,V3 版本的芯片必须有个电阻晶振才可以起振。

dodo55
Posts: 41
Joined: Fri Nov 19, 2021 10:01 am

Re: 【求助】外部32.768K晶振无法起振问题

Postby dodo55 » Sat Dec 18, 2021 1:17 am

ESP_ICY wrote:
Fri Dec 17, 2021 12:49 pm
我这边测试例程的话晶振是可以正常工作的,你这边用的是什么版本的idf?例程并没有特别用到外部晶振的,只要你在menuconfig配置里修改 RTC clock source 就可以了
用的是esp-idf_v4.4_beta1,咱们的开发板不同?

dodo55
Posts: 41
Joined: Fri Nov 19, 2021 10:01 am

Re: 【求助】外部32.768K晶振无法起振问题

Postby dodo55 » Sat Dec 18, 2021 1:21 am

ESP_LJH wrote:
Fri Dec 17, 2021 1:14 pm
您好,WROVER-KIT 你最好查下上件的模组是不是 WROVER-E,如果是,请在晶振上跨接一个 10 M 的电阻,V3 版本的芯片必须有个电阻晶振才可以起振。
的确是WROVER-E的,开机信息的确也是显示V3版:I (30) boot_comm: chip revision: 3, min. bootloader chip revision: 0
那我找个10M电阻试试。

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