ESP32-C3 Custom Board 1st Time Power Up Problem

[GeorgeIoak]

I have a board that I designed using the ESP32-C3 chip. I did not design in a USB-to-UART chip and have D+/D- (GPIO19/18) wired directly to the USB connector.

GPIO2 is pulled high with a 10k
GPIO8 is pulled high with a 10k
GPIO9 is pulled high is connected to a button that goes to GND when pressed

3.3V rail measures 3.3V
40MHz Oscillator is connected to XTAL_P

Windows 10 fails to enumerate the board (pressing the button while plugging in the USB cable) with an error message of "Device Descriptor Request Failed". I'm not sure if that means the ESP32-C# did not respond or if the reply was corrupt.

I have U0TXD/U0RXD connected to header and I tried to connect a FTDI board but could not see any messages on boot (what BAUD rate is used on the initial messages?

I thought I would post here to see if anyone has some helpful advice on how to find what the problem may be. I've inspected the board for soldering issues and don't see anything obviously wrong.

Thanks in advance for any help.

[ESP_Sprite]

You should at least see the signon message on the Tx pin... if you don't the chip likely is not starting up correctly. That's either your power or your clock, although I can't tell you what exactly is wrong with those. (Not sure if we support piping a 40MHz clock directly into the ESP32C3 in the way you did it.)

[GeorgeIoak]

Just so I can configure my terminal correctly what BAUD rate do these initial messages come through at? I remember that the ESP8266 has an initial rate of ~76kHz so I wanted to know if that was still the case.

I have yet to use a processor that did not accept an oscillator as the clock source. You can see it referenced in the Hardware Reference Manualhttps://www.espressif.com/sites/default ... nes_en.pdf, on page 10, Figure 7

I know the power rail is good but I do need to get the board connected to the scope and confirm there's 40MHz on the clock.

EDIT: Seems like there is a problem with the oscillator so I'll have to do some rework after the Holiday and see if I can get the clock going.

[ESP_Sprite]

Good thing you found it. My remark was mostly based the fact that you were sending the output of the osc directly into the ESP32, from memory you needed something else in series, and indeed the datasheet mentions an inductor there. Everything from the ESP32 on will output its initial boot message at 115200 baud.

[GeorgeIoak]

Yes, I do have a 0402 in series with the oscillator output before the ESP input. I've never had to use an inductor in another designs but if the ESP happens to be the odd MCU I'll be covered.

Thanks for confirming the initial BAUD is 115200, that will help eliminate one unknown once I replace the oscillator. This chip is still relatively new so there's not much information available for those of us "brave" enough to design in the chip instead of a module.

I'll report back once the oscillator is replaced just to close the loop on this post.

[GeorgeIoak]

I was able to replace the oscillator and make some progress. The board enumerates on a Windows PC and I have been able to program the board using the Arduino 2.0 IDE but the boards seems to be in an endless loop. Hopefully someone can take a look and see if they can find some clues as to what my next problem is.

Code: [Select all] [Expand/Collapse]

1. Build:Feb 7 2021
2. rst:0x15 (USB_UART_CHIP_RESET),boot:0xd (SPI_FAST_FLASH_BOOT)
3. Saved PC:0x40058866
4. SPIWP:0xee
5. mode:DIO, clock div:1
6. load:0x3fcd6100,len:0x1428
7. load:0x403ce000,len:0xc04
8. load:0x403d0000,len:0x292cSHA-256 comparison failed:
9. Calculated: 3fb1d9fe457d7386bff3d9c3ae0cda1b38124391f95e9abb3aee26ff386c0c79
10. Expected: 9b18b42e3e8e407f5e7b13f26c80172eda36d674c584e818f50843c766ebde69
11. Attempting to boot anyway...
12. entry 0x403ce000
13. I (43) boot: ESP-IDF v4.4-dev-2313-gc69f0ec32 2nd stage bootloader
14. I (43) boot: compile time 12:10:14
15. I (43) boot: chip revision: 3
16. I (43) boot_comm: chip revision: 3, min. bootloader chip revision: 0
17. I (58) qio_mode: Enabling QIO for flash chip WinBond
18. I (59) boot.esp32c3: SPI Speed : 80MHz
19. I (59) boot.esp32c3: SPI Mode : QIO
20. I (61) boot.esp32c3: SPI Flash Size : 16MB
21. I (65) boot: Enabling RNG early entropy source...
22. I (70) boot: Partition Table:
23. I (72) boot: ## Label Usage Type ST Offset Length
24. I (79) boot: 0 nvs WiFi data 01 02 00009000 00005000
25. I (85) boot: 1 otadata OTA data 01 00 0000e000 00002000
26. I (92) boot: 2 app0 OTA app 00 10 00010000 00140000
27. I (98) boot: 3 app1 OTA app 00 11 00150000 00140000
28. I (105) boot: 4 spiffs Unknown data 01 82 00290000 00170000
29. I (111) boot: End of partition table
30. I (115) boot_comm: chip revision: 3, min. application chip revision: 0
31. I (121) esp_image: segment 0: paddr=00010020 vaddr=3c0a0020 size=12cf8h ( 77048) map
32. I (139) esp_image: segment 1: paddr=00022d20 vaddr=3fc8e000 size=031f8h ( 12792) load
33. I (142) esp_image: segment 2: paddr=00025f20 vaddr=40380000 size=0a0f8h ( 41208) load
34. I (150) esp_image: segment 3: paddr=00030020 vaddr=42000020 size=96d78h (617848) map
35. I (238) esp_image: segment 4: paddr=000c6da0 vaddr=4038a0f8 size=03e48h ( 15944) load
36. I (241) esp_image: segment 5: paddr=000cabf0 vaddr=50000000 size=00010h ( 16) load
37. I (246) boot: Loaded app from partition at offset 0x10000
38. I (247) boot: Disabling RNG early entropy source...
39. Build:Feb 7 2021
40. rst:0x8 (TG1WDT_SYS_RST),boot:0xd (SPI_FAST_FLASH_BOOT)
41. Saved PC:0x40380082
42. SPIWP:0xee
43. mode:DIO, clock div:1
44. load:0x3fcd6100,len:0x1428
45. load:0x403ce000,len:0xc04
46. load:0x403d0000,len:0x292cSHA-256 comparison failed:
47. Calculated: 3fb1d9fe457d7386bff3d9c3ae0cda1b38124391f95e9abb3aee26ff386c0c79
48. Expected: 9b18b42e3e8e407f5e7b13f26c80172eda36d674c584e818f50843c766ebde69
49. Attempting to boot anyway...
50. entry 0x403ce000
51. I (42) boot: ESP-IDF v4.4-dev-2313-gc69f0ec32 2nd stage bootloader
52. I (42) boot: compile time 12:10:14
53. I (42) boot: chip revision: 3
54. I (43) boot_comm: chip revision: 3, min. bootloader chip revision: 0
55. I (58) qio_mode: Enabling QIO for flash chip WinBond
56. I (58) boot.esp32c3: SPI Speed : 80MHz
57. I (58) boot.esp32c3: SPI Mode : QIO
58. I (61) boot.esp32c3: SPI Flash Size : 16MB
59. W (65) boot.esp32c3: PRO CPU has been reset by WDT.
60. I (69) boot: Enabling RNG early entropy source...
61. I (74) boot: Partition Table:
62. I (76) boot: ## Label Usage Type ST Offset Length
63. I (83) boot: 0 nvs WiFi data 01 02 00009000 00005000
64. I (89) boot: 1 otadata OTA data 01 00 0000e000 00002000
65. I (96) boot: 2 app0 OTA app 00 10 00010000 00140000
66. I (102) boot: 3 app1 OTA app 00 11 00150000 00140000
67. I (109) boot: 4 spiffs Unknown data 01 82 00290000 00170000
68. I (116) boot: End of partition table
69. I (119) boot_comm: chip revision: 3, min. application chip revision: 0
70. I (125) esp_image: segment 0: paddr=00010020 vaddr=3c0a0020 size=12cf8h ( 77048) map
71. I (144) esp_image: segment 1: paddr=00022d20 vaddr=3fc8e000 size=031f8h ( 12792) load
72. I (146) esp_image: segment 2: paddr=00025f20 vaddr=40380000 size=0a0f8h ( 41208) load
73. I (155) esp_image: segment 3: paddr=00030020 vaddr=42000020 size=96d78h (617848) map
74. I (242) esp_image: segment 4: paddr=000c6da0 vaddr=4038a0f8 size=03e48h ( 15944) load
75. I (245) esp_image: segment 5: paddr=000cabf0 vaddr=50000000 size=00010h ( 16) load
76. I (250) boot: Loaded app from partition at offset 0x10000
77. I (251) boot: Disabling RNG early entropy source...

GeSHi © Codebox Plus Extension

[GeorgeIoak]

I made some additional progress and got some example code running. I saw on some other posts that you have to set "Flash Mode" from QIO to DIO. Doing that wasn't enough to get the code running properly but I changed "Core Debug Level" from the default None to Verbose and after that the code seemed to work as expected.

Programming the board always seems to take 2-3 tries so I'm not sure what's up with that but at least I'm making progress.

Is anyone else out there working on C3 projects?

[Kai Hiwatari]

Hey Georgeloak, you did a nice job, i would like to develop a custom board too, I'm going to use a bare C3 chip not a WROOM.

I'm going to use the embedded 4MB flash in the bare C3 and just 1 button to turn ON the C3, I won't use a reset button.

Can you explain me if I need to do the same thing as you did with the GPIO2,8 and 9?