I'm currently trying to develop an UART application in the esp32-wrover. But when I enable the pattern interrupt, I get the UART_FIFO_OVF event multiple times, repeating at least each 2 seconds. I have tried to increase the `rx_buffer_size` to 20KB when calling `uart_driver_install`, this reduces the issue, but it stills happens each 15 seconds.
I was able to reproduce this issue using the nmea parser example, but in `esp_handle_uart_pattern` instead of calling `gps_decode` it prints the line, as shown below. Likewise, I have tested this in the v4.0-stable and in v4.4-dev, and both have the same issue. I would ignore this issue but sometimes after the UART_FIFO_OVF error, the next line is incomplete. Also, I have seen that this issue is also mentioned here https://www.esp32.com/viewtopic.php?f=1 ... low#p81256.
Code: Select all
static void esp_handle_uart_pattern(esp_gps_t *esp_gps)
{
int pos = uart_pattern_pop_pos(esp_gps->uart_port);
if (pos != -1) {
/* read one line(include '\n') */
int read_len = uart_read_bytes(esp_gps->uart_port, esp_gps->buffer, pos + 1, 100 / portTICK_PERIOD_MS);
/* make sure the line is a standard string */
esp_gps->buffer[read_len] = '\0';
/* Send new line to handle */
// if (gps_decode(esp_gps, read_len + 1) != ESP_OK) {
// ESP_LOGW(GPS_TAG, "GPS decode line failed");
// }
ESP_LOGW(GPS_TAG, "line %s", esp_gps->buffer);
} else {
ESP_LOGW(GPS_TAG, "Pattern Queue Size too small");
uart_flush_input(esp_gps->uart_port);
}
}
Code: Select all
I (29) boot: ESP-IDF v4.4-dev-2740-gf65c8249af-dirty 2nd stage bootloader
I (29) boot: compile time 02:13:19
I (30) boot: chip revision: 3
I (34) boot_comm: chip revision: 3, min. bootloader chip revision: 0
I (41) boot.esp32: SPI Speed : 40MHz
I (46) boot.esp32: SPI Mode : DIO
I (50) boot.esp32: SPI Flash Size : 2MB
I (55) boot: Enabling RNG early entropy source...
I (60) boot: Partition Table:
I (64) boot: ## Label Usage Type ST Offset Length
I (71) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (79) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (86) boot: 2 factory factory app 00 00 00010000 00100000
I (94) boot: End of partition table
I (98) boot_comm: chip revision: 3, min. application chip revision: 0
I (105) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=09814h ( 38932) map
I (128) esp_image: segment 1: paddr=0001983c vaddr=3ffb0000 size=023a4h ( 9124) load
I (131) esp_image: segment 2: paddr=0001bbe8 vaddr=40080000 size=04430h ( 17456) load
I (141) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=18628h ( 99880) map
I (178) esp_image: segment 4: paddr=00038650 vaddr=40084430 size=07c10h ( 31760) load
I (191) esp_image: segment 5: paddr=00040268 vaddr=50000000 size=00010h ( 16) load
I (198) boot: Loaded app from partition at offset 0x10000
I (198) boot: Disabling RNG early entropy source...
I (211) cpu_start: Pro cpu up.
I (212) cpu_start: Starting app cpu, entry point is 0x400810b8
0x400810b8: call_start_cpu1 at /opt/esp/idf/components/esp_system/port/cpu_start.c:156
I (0) cpu_start: App cpu up.
I (226) cpu_start: Pro cpu start user code
I (226) cpu_start: cpu freq: 160000000
I (226) cpu_start: Application information:
I (230) cpu_start: Project name: nmea_parser
I (236) cpu_start: App version: v4.4-dev-2740-gf65c8249af-dirty
I (243) cpu_start: Compile time: Aug 28 2021 02:21:48
I (249) cpu_start: ELF file SHA256: 78277a9c8fc75fa5...
I (255) cpu_start: ESP-IDF: v4.4-dev-2740-gf65c8249af-dirty
I (262) heap_init: Initializing. RAM available for dynamic allocation:
I (269) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (275) heap_init: At 3FFB2C88 len 0002D378 (180 KiB): DRAM
I (281) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (288) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (294) heap_init: At 4008C040 len 00013FC0 (79 KiB): IRAM
I (301) spi_flash: detected chip: gd
I (305) spi_flash: flash io: dio
W (308) spi_flash: Detected size(16384k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (323) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (333) uart: queue free spaces: 16
I (343) nmea_parser: NMEA Parser init OK
W (353) nmea_parser: line FF FF 7D 80 7D FF FF FF
W (403) nmea_parser: line
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