Code: Select all
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6912
ho 0 tail 12 room 4
load:0x40078000,len:15428
load:0x40080400,len:4644
entry 0x400806ec
I (75) boot: Chip Revision: 1
I (75) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (40) boot: ESP-IDF v4.0-rc-12-ga61fd1e42b 2nd stage bootloader
I (40) boot: compile time 21:54:19
I (40) boot: Enabling RNG early entropy source...
I (46) boot: SPI Speed : 40MHz
I (50) boot: SPI Mode : DIO
I (54) boot: SPI Flash Size : 4MB
I (58) boot: Partition Table:
I (62) boot: ## Label Usage Type ST Offset Length
I (69) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (77) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (84) boot: 2 factory factory app 00 00 00010000 00200000
I (92) boot: End of partition table
I (96) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f400020 size=0x5bd80 (376192) map
I (240) esp_image: segment 1: paddr=0x0006bda8 vaddr=0x3ffb0000 size=0x04270 ( 17008) load
I (247) esp_image: segment 2: paddr=0x00070020 vaddr=0x400d0020 size=0xe5734 (939828) map
I (583) esp_image: segment 3: paddr=0x0015575c vaddr=0x3ffb4270 size=0x01700 ( 5888) load
I (586) esp_image: segment 4: paddr=0x00156e64 vaddr=0x40080000 size=0x00404 ( 1028) load
I (591) esp_image: segment 5: paddr=0x00157270 vaddr=0x40080404 size=0x1cf24 (118564) load
I (668) boot: Loaded app from partition at offset 0x10000
I (668) boot: Disabling RNG early entropy source...
I (668) psram: This chip is ESP32-D0WD
I (674) spiram: Found 64MBit SPI RAM device
I (677) spiram: SPI RAM mode: flash 40m sram 40m
I (683) spiram: PSRAM initialized, cache is in low/high (2-core) mode.
I (690) cpu_start: Pro cpu up.
I (694) cpu_start: Application information:
I (698) cpu_start: Project name: esp32_mp3_decoder
I (704) cpu_start: App version: 2908bbc-dirty
I (710) cpu_start: Compile time: Mar 9 2020 22:17:16
I (716) cpu_start: ELF file SHA256: 2c257a44eb9e2dfd...
I (722) cpu_start: ESP-IDF: v4.1-dev-2079-g5dbabae9dc-dirty
I (729) cpu_start: Starting app cpu, entry point is 0x400816fc
I (715) cpu_start: App cpu up.
I (1566) spiram: SPI SRAM memory test OK
I (1568) heap_init: Initializing. RAM available for dynamic allocation:
I (1568) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (1573) heap_init: At 3FFB8DF8 len 00027208 (156 KiB): DRAM
I (1579) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (1586) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (1592) heap_init: At 4009D328 len 00002CD8 (11 KiB): IRAM
I (1599) cpu_start: Pro cpu start user code
I (1604) spiram: Adding pool of 3821K of external SPI memory to heap allocator
I (1624) esp_himem: Initialized. Using last 8 32KB address blocks for bank switching on 4352 KB of physical memory.
I (1626) spi_flash: detected chip: generic
I (1630) spi_flash: flash io: dio
I (1634) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (1644) spiram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (1664) main: starting app_main()
I (1664) main: RAM left: 240415
esp_himem_get_phys_size: 4456448
esp_himem_get_free_size: 4456448
heap_caps_get_free_size: 272243
esp_get_free_heap_size: 239515
esp_get_minimum_free_heap_size: 239516
heap_caps_get_free_size: 239515
heap_caps_get_minimum_free_size: 239516
Guru Meditation Error: Core 0 panic'ed (StoreProhibited) at pc=400991f8. Setting bp and returning..
Code: Select all
printf("esp_himem_get_phys_size: %d\n", esp_himem_get_phys_size());
printf("esp_himem_get_free_size: %d\n", esp_himem_get_free_size());
printf("heap_caps_get_free_size: %d\n", heap_caps_get_free_size(MALLOC_CAP_8BIT));
printf("esp_get_free_heap_size: %d\n", esp_get_free_heap_size());
printf("esp_get_minimum_free_heap_size: %d\n", esp_get_minimum_free_heap_size());
printf("heap_caps_get_free_size: %d\n", heap_caps_get_free_size(MALLOC_CAP_DEFAULT));
printf("heap_caps_get_minimum_free_size: %d\n",
heap_caps_get_minimum_free_size(MALLOC_CAP_DEFAULT));
Code: Select all
void spiRamInit()
{
uint8_t* spiram;
spiram = (uint8_t*)malloc(SPIRAMSIZE);
Code: Select all
static inline void uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
#if XCHAL_HAVE_S32C1I
__asm__ __volatile__ (
"WSR %2,SCOMPARE1 \n"
"S32C1I %0, %1, 0 \n"
:"=r"(*set)
:"r"(addr), "r"(compare), "0"(*set) );
thx for your help!