I'm working on a project to collect sensor data from SPI through ULP. My intension is to implement bit-bang logic according to the interface requirement. The way I'm thinking about is like below:
1. create a ulp_main, wrap the code calling ULP instructions, and enter deep_sleep after that.
2. main function will call ulp_main() right after reset
3. Implement a deep sleep stub to decide if really need to wake up main MCU.
Code: Select all
void ulp_main(){
const ulp_insn_t program[] = {
I_MOVI(R3, 16), // R3 <- 16
..... // toggle IOs here
I_END(0)
};
size_t load_addr = 0;
size_t size = sizeof(program)/sizeof(ulp_insn_t);
ulp_process_macros_and_load(load_addr, program, &size);
ulp_run(load_addr);
esp_deep_sleep_enable_timer_wakeup(TIMER_INTERVAL0_SEC*1000000);
esp_deep_sleep_start();
}
void RTC_IRAM_ATTR esp_wake_deep_sleep(void) {
esp_default_wake_deep_sleep();
// TODO .... check if really wake up main CPU here, goto deep sleep again if not
}
void app_main(void)
{
nvs_flash_init();
ulp_main();
}
the IO toggeling being implemented in ulp_main, was excuted repeatedly (around every 4ms), though I set the timer TIMER_INTERVAL0_SEC=1.5 second, I had expect this should be executed only once every TIMER_INTERVAL0_SEC time. But it seems some logic controls the execution of ulp processor, which is unknown to me. Please help!
any comments will be welcome, thansks!