ULP for SPI sensors

[jeromeh]

Thanks WiFive!

I tried loading the LED example into my board, somehow I'm seeing the LED (on GPIO2) is constantly on rather than toggling - which should be the expected behavior as per the test program.

BTW, how do I know what is the clock freq for ULP? spec mentioned a 32K RTC_CLK and it's configurable, but not saying how I can program that.

[WiFive]

From menuconfig

Choose which clock is used as RTC clock source.
The only available option for now is to use internal
150kHz RC oscillator.

From manual

Low Power Clocks
– XTL32K_CLK is a clock generated using an external crystal with a frequency of 32 KHz.
– RTC8M_CLK is an internal clock with a default frequency of 8 MHz. This frequency is adjustable.
– RTC8M_D256_CLK is divided from RTC8M_CLK 256. Its frequency is (RTC8M_CLK / 256). With the
default RTC8M_CLK frequency of 8 MHz, this clock runs at 31.250 KHz.
– RTC_CLK is an internal low power clock with a default frequency of 150 KHz. This frequency is
adjustable.

From ulp.c

// make sure voltage is raised when RTC 8MCLK is enabled
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_I2C_FOLW_8M);

From manual

The clock sources of SLOW_CLK and FAST_CLK are low-frequency clocks. The RTC module can operate when
most other clocks are stopped.
SLOW_CLK is used to clock the Power Management module. It can be sourced from RTC_CLK, XTL32K_CLK
or RTC8M_D256_CLK
FAST_CLK is used to clock the On-chip Sensor module. It can be sourced from a divided XTL_CLK or from
RTC8M_CLK.

So seems like it runs from rtc fast clock which is RTC8M_CLK in deep sleep.

[ESP_krzychb]

RTC power domain does have an I2C peripheral

Will the upcoming I2C driver support this peripheral operating in ULP mode?

[WiFive]

RTC power domain does have an I2C peripheral

Will the upcoming I2C driver support this peripheral operating in ULP mode?

No I don't think so only simple i2c operations written in the ulp opcode macros will run on ulp. https://github.com/espressif/esp-idf/bl ... /ulp.h#L54

[ESP_igrr]

By the way, we have binutils for the ULP in pipeline. Release expected at some point in January.

[ESP_krzychb]

@WiFive, @ ESP_igrr
Thank you for clarification!

[jeromeh]

How is the progress of binutils for ULP? Can I expect it soon?

By the way, we have binutils for the ULP in pipeline. Release expected at some point in January.

[ESP_igrr]

Initial binutils version for the ULP has been finished, although code generation hasn't been tested extensively yet. We are working on integrating the ULP toolchain into the build system, so that you can access variables declared on the ULP side from the Xtensa core directly by their names, and load the ULP program into RTC memory automatically...

If you wish, we can share the draft version of binutils, which is not integrated into the build system. You will need to extract sections from the ULP .elf file yourself and load them into the right place in RTC memory.

[jeromeh]

Thanks @ESP_igrr for your update! Please share the binutils tool across, so I can start play with it - I need to build some custom SPI logic with it.

BTW, when do you expect to release the build flow update mentioned here? Thanks

[ESP_igrr]

Okay, we'll push the toolchain over to Github.

Regarding timeline for full integration into the build system, it should be ready by the end of next week.