I'm designing a board with the ESP32-D0WD or ESP32-D0WDQ6 (I dont mind) and a 16MB (128Mb) Flash, but first of all I want to do some tests on my ESP-WROM-32 module. I need in my PCB both SD card (working with SD function, I mean, 4Bit Mode) and Flash (working with QIO mode), and I prefer to keep JTAG pins not used for this purpose.
I have 2 configurations in mind:
1 - Connect SDcard to standard Flash pins (GPIO 6-11) and the Flash to VSPI pins (GPIO 5, 18, 19,...). Let JTAG pins (GPIO 12-15) unconnected. Burn efuses for new Flash mapping.
2 - Connect Flash to standard Flash pins (GPIO 6-11) and SDcard to pins for JTAG (GPIO 12-15) and GPIO0,2 recommended by official documentation (SD/MMC slot 1 HS2_CMD, HS2_CLK, HS2_D0, HS2_D1, HS2_D2, HS2_D3 lines). And do some tricky stuff with GPIO0,2 to enter UART download mode. Remap JTAG pins into other pins.
Well, I'm testing the first one and I'm having some troubles:
First of all I have burned the efuses: Then I have configured the WP pin to GPIO 22: And I do it a try: DIO mode works, but in QIO mode it doesnt work at all.
I get this log errors:
Code: Select all
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 353727698, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:6368
ho 0 tail 12 room 4
load:0x40078000,len:10116
load:0x40080400,len:6840
entry 0x40080768
I (31) boot: ESP-IDF v3.2-dev-518-g020ade65 2nd stage bootloader
I (31) boot: compile time 11:25:36
I (31) boot: Enabling RNG early entropy source...
I (37) qio_mode: Enabling QIO for flash chip ISSI
I (43) boot: SPI Speed : 40MHz
I (47) boot: SPI Mode : QOUT
I (51) boot: SPI Flash Size : 16MB
E (55) flash_parts: partition 0 invalid magic number 0x10ee
E (61) boot: Failed to verify partition table
E (66) boot: load partition table error!
Code: Select all
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 353727698, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:8576
ho 0 tail 12 room 4
load:0x40078000,len:10732
load:0x40080400,len:7380
entry 0x400807bc
D (123) bootloader_flash: mmu set block paddr=0x00000000 (was 0xffffffff)
I (37) boot: ESP-IDF v3.2-dev-518-g020ade65 2nd stage bootloader
I (38) boot: compile time 11:40:00
I (38) boot: Enabling RNG early entropy source...
D (44) qio_mode: Probing for QIO mode enable...
D (49) qio_mode: Raw SPI flash chip id 0x9d6018
D (53) qio_mode: Manufacturer ID 0x9d chip ID 0x6018
I (58) qio_mode: Enabling QIO for flash chip ISSI
D (64) qio_mode: Initial flash chip status 0x42
D (68) qio_mode: QIO mode already enabled in flash
D (73) qio_mode: Enabling QIO mode...
D (77) boot: magic e9
D (79) boot: segments 04
D (82) boot: spi_mode 02
D (85) boot: spi_speed 00
D (87) boot: spi_size 04
I (90) boot: SPI Speed : 40MHz
I (94) boot: SPI Mode : QIO
I (98) boot: SPI Flash Size : 16MB
D (102) bootloader_flash: mmu set paddr=00000000 count=1
D (107) boot: mapped partition table 0x8000 at 0x3f408000
E (113) flash_parts: partition 0 invalid magic number 0x10ee
E (119) boot: Failed to verify partition table
E (124) boot: load partition table error!
So, the question is: What am I doing wrong?
I have to take configuration 2?
Or it is something about my Flash model? (My flash is an IS25WP128F from ISSI)
Can I have some recommendation or has someone tested the same?
Can I send the PCB to production with some of the configurations above?
If I do so, what I have to do with GPIO 0 and 2 for using them for SDcard and still being able to entering download mode?
Thanks you all and sorry for my english