What would you like to see in The Next Chip?

[Lucas.Hutchinson]

Thanks for the feedback @ESP_Sprite.

Looks like there is going to be an even better chip coming the the next little wile (well at least little while on a new silicon timeframe..)

One thing to mention about the USB 2.0 Perhaps if for the next chip adding a 2.0PHY is not possibly/practical, enabling a ULPI interface (eg a USB3300 chip) to an external PHY (like what ST does for all of the USB 2.0 HS in their products) this would be a good compromise..? Just a thought

[ESP_Sprite]

We have looked into this. USB is a fairly late addition to the specsheet however (because... well... 'but you have WiFi and BT, that has all the transfer options you need, right?') so apart from the fact that I'm pretty sure we're gonna have USB, I'm not sure what kind of PHY/interface/MAC/... we'll be able to cram in.

[mike95826]

ARINC429 (intra instrument serial data protocol) same as CAN but for aircraft.

[mike95826]

Analog section... Probably on separate chip, integrated into module.
Configurable with op-amps and filters for instrumentation and audio, comparators and zero crossing detectors.

[mike95826]

More GPIO's
5v tolerant
Internal Pull-up or Pull-down, strong = 1k or weak = 10k

[stefanct]

Two things are certainly important for many people:

• on-chip flash and/or more usable GPIOs.
• USB

Integration of LoRa would be awesome, more GP timers would be useful (although there are already some peripherals that can be used to implement what is done with GP timers on other devices like pulse counting).

I guess not too much new stuff could foster the currently existing foundation. Users use only a fraction of what is possible anyway.

[rin67630]

Thank you for asking and for reading our comments!

What I currently miss on the ESP32

-Provide really linear ADCs starting at zero mV.
-Provide differential input ADC.
-I/O 5v tolerant.
-Wake from deep sleep without HW wiring.

For the time being the most important weaknesses are in the compilers:
we badly miss the possibility to compile for the ULP core and compile separately for both cores of the ESP 32.

Regards
Laszlo

[ESP_Sprite]

How do you mean, wake from deep sleep without hardware modifications? Also, what use case would you have to compile sepate things for both cores?

[javaben]

A direct thermocouple to adc conversion. You've already got the onboard temperature for cold junction compensation, a 12 bit ADC, so an amplifier and mapping tables or accurate math to complete the activity would be nice. Currently I'm having to add thermocouple chips from other companies.

Thanks

[Deouss]

I'd like to see hardware LVDS protocols with easy integration to large panels with touchscreen digitizers.
Maybe also fast USB protocols/implementations to exchange data with PCs.
H264/5 hardware de/compression chip? Going further - PCIe ?