Logic analyzer on ESP32 for self-diagnostics

[blade77]

Thanks a lot! Static 40 MHz sample rate seems to work fine for my use case. I would also like to send packages at 40 MHz as a kind of automation. I will try to figure out how.

[blade77]

I had to do the following changes for slave mode (using external clock) on ESP32:

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gpio_matrix_in(SD_CLOCK_PIN, I2S0I_WS_IN_IDX, false);

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I2SX.conf.rx_slave_mod = 1;

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//    logic_analyzer_ll_set_clock(sample_rate);

It seems to capture sd interface signals stable with 20 MHz clock.

[ok-home]

It seems to capture sd interface signals stable with 20 MHz clock.

I'm glad it worked out for you ))

[blade77]

on a side note via commenting

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//    logic_analyzer_ll_set_clock(sample_rate);

actually default values will be applied according the ESP32 technical reference manual. The default values are equivalent with these lines

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   I2SX.clkm_conf.clkm_div_num = 4;
   I2SX.sample_rate_conf.rx_bck_div_num = 6;

... actually I don't get why does it work on 20 MHz in slave mode...

[ok-home]

on a side note via commenting

Code: Select all

// logic_analyzer_ll_set_clock(sample_rate);

actually default values will be applied according to the ESP32 technical reference manual. The default values are equivalent with these lines

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 I2SX.clkm_conf.clkm_div_num = 4; I2SX.sample_rate_conf.rx_bck_div_num = 6;

.... actually I don't get why does it work on 20 MHz in slave mode...

I haven't looked into slave mode in detail I can only assume that
I2SX.clkm_conf.clkm_div_num = 4; clk -> 160/4 = 40 mHz
I2SX.sample_rate_conf.rx_bck_div_num = 6; -> not used because you are feeding external clk to WS_IN, maybe 40 mHz is enough to steadily capture 20 mHz samples

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[blade77]

Thanks a lot! It is a very useful hint that actually rx_bck_div_num is not used in parallel slave mode.