ESP32 TRM: I2C interrupt flags
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- Posts: 1994
- Joined: Mon Oct 17, 2022 7:38 pm
- Location: Europe, Germany
ESP32 TRM: I2C interrupt flags
I just noticed that the I2C interrupt status/mask/enable bits documented in the ESP32 TRM v4.8 do not match the definitions in soc/i2c_reg.h, like, at all.
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- Posts: 1994
- Joined: Mon Oct 17, 2022 7:38 pm
- Location: Europe, Germany
Re: ESP32 TRM: I2C interrupt flags
Sorry, my mistake.
I failed to see that the right-most bit of the registers' diagrams is supposed to be bit #3 and bit #5 is the one just left of #3
I failed to see that the right-most bit of the registers' diagrams is supposed to be bit #3 and bit #5 is the one just left of #3

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