ESP12-F Unable to activate HSPI - Causing watchdog reset

[Pierre-Jean]

Hi, i'm struggling tu use HSPI on ESP8266 (ESP12-F / NONOS / SDK 3.0.5). For the SPI part, i use the following code grabbed on GitHub
----------------------------------------------------
if(spi_no==SPI){
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005|(clock_div_flag<<8)); //Set bit 8 if 80MHz sysclock required
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);
}else if(spi_no==HSPI){
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105|(clock_div_flag<<9)); //Set bit 9 if 80MHz sysclock required
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2); //GPIO12 is HSPI MISO pin (Master Data In)
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2); //GPIO13 is HSPI MOSI pin (Master Data Out)
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2); //GPIO14 is HSPI CLK pin (Clock)
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2); //GPIO15 is HSPI CS pin (Chip Select / Slave Select)
}
--------------------------------------------------
I would like to set up the HSPI clock to a few MHz so i think, according to the comments, that 0x105 is the correct value to write in the PERIPHS_IO_MUX register.

My code starts whitout issue, displaying various strings on UART output but, as soon as i write 0x105 in PERIPHS_IO_MUX during the HSPI initialization phase, the program hangs causing a watchdog reset.
1) I checked (and even changed) the power supply and its OK (220µF + 100nF in // on Vcc)
2) I also tried to write 0x305 -> same behavior (reset)
3) I tried to read the value at @PERIPHS_IO_MUX and i got 0x205 ( 80MHz on HSPI ?). Then writing back 0x205 at the same address is OK -> not a memory access issue. I checked SCLK pin with an oscilloscope -> no clock
4) I tried a second ESP12-F chip -> same behavior (reset)

One thing a little bit strange for me : according to the code and comments, the value of 0x105 can program two differents configurations: HSPI with clock<80MHz but also SPI with clock=80Mhz. Which one is correct ?

I've been searching on Internet for days and found nothing similar to this very basic issue...

Any idea or suggestion are welcome.

[Pierre-Jean]

Hi,

i made some progress on the subject : i noticed, with the code below coming from Espressif's examples, that with the attribute "ICACHE_FLASH_ATTR" i have a crash after the WRITE_PERI_REG. If i remove the attribute on the function then the instructions are executed and there is later a crash on an other SPI function with the ICACHE_FLASH_ATTR

What is the link between the ICACHE attribute and the access to ESP8266 registers ? Is there a global setup or configuration i am missing ?

Any idea welcome....

Best regards

-------------------------------------------------------------
void ICACHE_FLASH_ATTR spi_master_test()
//void spi_master_test()
{
SpiAttr hSpiAttr;
hSpiAttr.bitOrder = SpiBitOrder_MSBFirst;
hSpiAttr.speed = SpiSpeed_10MHz;
hSpiAttr.mode = SpiMode_Master;
hSpiAttr.subMode = SpiSubMode_0;

// Init HSPI GPIO
WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);//configure io to spi mode
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);//configure io to spi mode
SPIInit(SpiNum_HSPI, &hSpiAttr);
uint32_t value = 0xD3D4D5D6;
uint32_t sendData[8] ={ 0 };
SpiData spiData;

os_printf("\r\n ============= spi init master ============= \r\n");

[Pierre-Jean]

Hi, an other step on this issue.
The idea of the ICACHE_FLASH_ATTR was a wrong track.
After several differents attempts in programming the PERIPHS_IO_MUX register, i found that a value of 0x005 does the job. Of course it does not crash and i can then have a nice serial SPI clock tuned at 8MHz. I performed SPI transaction with an SPI RAM with no issue.

Then i still does not understand why a write of 0x105 ends up with a crash. This value of 0x105 comes from a SPI driver written a long time ago by "MetalPhreak" and available on Github. Seeing a lot of people on Internet using this driver suggests that is works....
Did anyone already had this issue ? Is there something i missed ?
Best regards.