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esp32-s2更改adc采样频率后,系统不断复位的原因????

Posted: Wed May 12, 2021 6:33 am
by liwei0225
关于ADC采样频率的配置代码如下:
adc_digi_config_t config = {
.conv_limit_en = false,
.conv_limit_num = 0,
.interval = TEST_ADC_TRIGGER_INTERVAL_DEFAULT,
.dig_clk.use_apll = 0, // APB clk
.dig_clk.div_num = TEST_ADC_DIGI_CLK_DIV_DEFAULT,
.dig_clk.div_b = 0,
.dig_clk.div_a = 0,
.dma_eof_num = 2*SAR_SIMPLE_NUM,//R_EOF_NUMBER((adc > 2) ? 2 : 1, SAR_SIMPLE_NUM),
};

其中
#define TEST_ADC_TRIGGER_INTERVAL_DEFAULT (2048)
#define TEST_ADC_DIGI_CLK_DIV_DEFAULT (99)
两个数值都在取值范围内呀,为何系统一直重启,请大家多指教。

复位log如下:
:679::FAIL: Expected 0 Was 1Guru Meditation Error: Core 0 panic'ed (StoreProhibited). Exception was unhandled.

Core 0 register dump:
PC : 0x40000605 PS : 0x00060f30 A0 : 0x00000000 A1 : 0x3ffd75d0
A2 : 0x3ffcd4c4 A3 : 0x00000001 A4 : 0x00000000 A5 : 0x00000000
A6 : 0x00000044 A7 : 0xfffffff0 A8 : 0x80085714 A9 : 0x3ffd75a0
A10 : 0x00000000 A11 : 0x000002a7 A12 : 0x00060820 A13 : 0x000000a5
A14 : 0x00060023 A15 : 0x00000001 SAR : 0x00000011 EXCCAUSE: 0x0000001d
EXCVADDR: 0xfffffff0 LBEG : 0x00060820 LEND : 0x000000a5 LCOUNT : 0x40026055
0x40026055: _xt_user_exc at C:/Users/liny/Desktop/esp-idf-2/components/freertos/xtensa/xtensa_vectors.S:627


Backtrace:0x40000602:0x3ffd75d0


ELF file SHA256: 63ef812335a8ab5a

Rebooting...
ESP-ROM:esp32s2-rc4-20191025
Build:Oct 25 2019
rst:0x3 (RTC_SW_SYS_RST),boot:0xb (SPI_FAST_FLASH_BOOT)
Saved PC:0x40025125
0x40025125: esp_restart_noos_dig at C:/Users/liny/Desktop/esp-idf-2/components/esp_system/system_api.c:60 (discriminator 1)

SPIWP:0xee
mode:DIO, clock div:1
load:0x3ffe6100,len:0x4
load:0x3ffe6104,len:0x1890
load:0x4004c000,len:0x1688
load:0x40050000,len:0x20fc
entry 0x4004c324
I (48) boot: ESP-IDF v4.2-dirty 2nd stage bootloader
I (48) boot: compile time 09:45:35
I (48) boot: chip revision: 0
I (51) boot.esp32s2: SPI Speed : 80MHz
I (55) boot.esp32s2: SPI Mode : DIO
I (60) boot.esp32s2: SPI Flash Size : 2MB
I (65) boot: Enabling RNG early entropy source...
I (70) boot: Partition Table:
I (74) boot: ## Label Usage Type ST Offset Length
I (81) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (88) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (96) boot: 2 factory factory app 00 00 00010000 00100000
I (103) boot: End of partition table
I (108) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f000020 size=0x17c54 ( 97364) map
I (137) esp_image: segment 1: paddr=0x00027c7c vaddr=0x3ffc8900 size=0x0329c ( 12956) load
I (140) esp_image: segment 2: paddr=0x0002af20 vaddr=0x40024000 size=0x00404 ( 1028) load
0x40024000: _WindowOverflow4 at C:/Users/liny/Desktop/esp-idf-2/components/freertos/xtensa/xtensa_vectors.S:1730

Re: esp32-s2更改adc采样频率后,系统不断复位的原因????

Posted: Wed May 12, 2021 6:34 am
by liwei0225
补充一下,当TEST_ADC_DIGI_CLK_DIV_DEFAULT = 9 时,系统可以正常AD采集。

Re: esp32-s2更改adc采样频率后,系统不断复位的原因????

Posted: Fri May 14, 2021 3:18 am
by ESP_Gargamel
能否提供一下 sample code 以供复现确认。不然,请从 backtrace 往回分析一下。