开发板：ESP32-S3-DevKitC-1-N32R8V
IDF:v5.0
重启日志：
Code: Select all
ELF file SHA256: c283c4f9cdaf5567
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375755
0x40375755: esp_restart_noos_dig at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/esp_system/esp_system.c:46 (discriminator 1)
SPIWP:0xee
Octal Flash Mode Enabled
For OPI Flash, Use Default Flash Boot Mode
mode:SLOW_RD, clock div:1
load:0x3fce3978,len:0x29e0
load:0x403c9700,len:0xbe8
load:0x403cc700,len:0x44d4
entry 0x403c9904
I (51) boot: ESP-IDF v5.0-dirty 2nd stage bootloader
I (51) boot: compile time 18:49:52
I (52) boot: chip revision: v0.1
I (54) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (61) boot.esp32s3: Boot SPI Speed : 80MHz
I (65) boot.esp32s3: SPI Mode : SLOW READ
I (71) boot.esp32s3: SPI Flash Size : 2MB
I (75) boot: Enabling RNG early entropy source...
I (81) boot: Partition Table:
I (84) boot: ## Label Usage Type ST Offset Length
I (92) boot: 0 nvs WiFi data 01 02 0000a000 00006000
I (99) boot: 1 storage Unknown data 01 ff 00010000 00001000
I (107) boot: 2 factory factory app 00 00 00020000 00100000
I (114) boot: 3 nvs_key NVS keys 01 04 00120000 00001000
I (122) boot: 4 custom_nvs WiFi data 01 02 00121000 00006000
I (129) boot: End of partition table
I (134) boot_comm: chip revision: 1, min. application chip revision: 0
I (141) esp_image: segment 0: paddr=00020020 vaddr=3c020020 size=09c74h ( 40052) map
I (160) esp_image: segment 1: paddr=00029c9c vaddr=3fc91900 size=02ae8h ( 10984) load
I (163) esp_image: segment 2: paddr=0002c78c vaddr=40374000 size=0388ch ( 14476) load
I (171) esp_image: segment 3: paddr=00030020 vaddr=42000020 size=1e1b0h (123312) map
I (206) esp_image: segment 4: paddr=0004e1d8 vaddr=4037788c size=0a014h ( 40980) load
I (219) esp_image: segment 5: paddr=000581f4 vaddr=50000000 size=00010h ( 16) load
I (225) boot: Loaded app from partition at offset 0x20000
I (225) boot: Checking flash encryption...
I (227) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (235) boot: Disabling RNG early entropy source...
I (251) cpu_start: Pro cpu up.
I (252) cpu_start: Starting app cpu, entry point is 0x403752b4
0x403752b4: call_start_cpu1 at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/esp_system/port/cpu_start.c:142
I (0) cpu_start: App cpu up.
I (266) cpu_start: Pro cpu start user code
I (267) cpu_start: cpu freq: 160000000 Hz
I (267) cpu_start: Application information:
I (270) cpu_start: Project name: flash_encryption
I (275) cpu_start: App version: 1
I (280) cpu_start: Compile time: Apr 26 2023 18:49:37
I (286) cpu_start: ELF file SHA256: c283c4f9cdaf5567...
I (292) cpu_start: ESP-IDF: v5.0-dirty
I (297) heap_init: Initializing. RAM available for dynamic allocation:
I (304) heap_init: At 3FC94E40 len 000548D0 (338 KiB): D/IRAM
I (311) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (317) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (323) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (331) spi_flash: detected chip: mxic
W (334) spi_flash: Detected flash size > 16 MB, but access beyond 16 MB is not supported for this flash model yet.
I (345) spi_flash: flash io: dio
W (349) spi_flash: Detected size(32768k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
W (362) flash_encrypt: Flash encryption mode is DEVELOPMENT (not secure)
I (371) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
Example to check Flash Encryption status
This is esp32s3 chip with 2 CPU core(s), WiFi/BLE, silicon revision v0.1, 2MB external flash
FLASH_CRYPT_CNT eFuse value is 1
Flash encryption feature is enabled in DEVELOPMENT mode
Erasing partition "storage" (0x1000 bytes)
Writing data with esp_partition_write:
I (514) example: 0x3fcf3b10 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f |................|
I (514) example: 0x3fcf3b20 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f |................|
Reading with esp_partition_read:
I (524) example: 0x3fcf3af0 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f |................|
I (534) example: 0x3fcf3b00 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f |................|
Reading with esp_flash_read:
I (554) example: 0x3fcf3af0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
I (554) example: 0x3fcf3b00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
I (564) nvs: NVS key partition empty, generating keys
I (634) nvs: NVS partition "nvs" is encrypted.
E (634) example: Failed to read NVS security cfg: [0x1116] (ESP_ERR_NVS_KEYS_NOT_INITIALIZED)
ESP_ERROR_CHECK failed: esp_err_t 0x1116 (ESP_ERR_NVS_KEYS_NOT_INITIALIZED) at 0x4200829e
0x4200829e: app_main at D:/WorkSpace/Espressif/security/flash_encryption/main/flash_encrypt_main.c:87 (discriminator 1)
file: "./main/flash_encrypt_main.c" line 87
func: app_main
expression: ret
abort() was called at PC 0x4037a2d7 on core 0
0x4037a2d7: _esp_error_check_failed at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/esp_system/esp_err.c:47
Backtrace: 0x40375db6:0x3fcf3a70 0x4037a2e1:0x3fcf3a90 0x4037f7e6:0x3fcf3ab0 0x4037a2d7:0x3fcf3b20 0x4200829e:0x3fcf3b50 0x4201dfdf:0x3fcf3b70 0x4037ccb9:0x3fcf3ba0
0x40375db6: panic_abort at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/esp_system/panic.c:412
0x4037a2e1: esp_system_abort at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/esp_system/esp_system.c:135
0x4037f7e6: abort at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/newlib/abort.c:38
0x4037a2d7: _esp_error_check_failed at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/esp_system/esp_err.c:47
0x4200829e: app_main at D:/WorkSpace/Espressif/security/flash_encryption/main/flash_encrypt_main.c:87 (discriminator 1)
0x4201dfdf: main_task at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/freertos/FreeRTOS-Kernel/portable/port_common.c:131 (discriminator 2)
0x4037ccb9: vPortTaskWrapper at D:/Studio/Espressif/frameworks/esp-idf-v5.0/components/freertos/FreeRTOS-Kernel/portable/xtensa/port.c:151Code: Select all
espefuse.py v4.4
Connecting...
Failed to get PID of a device on com3, using standard reset sequence.
.
Detecting chip type... ESP32-S3
=== Run "summary" command ===
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Calibration fuses:
TEMP_SENSOR_CAL (BLOCK2) ??? Temperature calibration = -23.5 R/W (0b111101011)
ADC1_MODE0_D2 (BLOCK2) ??? ADC1 calibration 1 = 28 R/W (0x07)
ADC1_MODE1_D2 (BLOCK2) ??? ADC1 calibration 2 = 216 R/W (0x36)
ADC1_MODE2_D2 (BLOCK2) ??? ADC1 calibration 3 = -432 R/W (0xec)
ADC1_MODE3_D2 (BLOCK2) ??? ADC1 calibration 4 = 200 R/W (0x32)
ADC2_MODE0_D2 (BLOCK2) ??? ADC2 calibration 5 = -332 R/W (0xd3)
ADC2_MODE1_D2 (BLOCK2) ??? ADC2 calibration 6 = -192 R/W (0xb0)
ADC2_MODE2_D2 (BLOCK2) ??? ADC2 calibration 7 = -324 R/W (0xd1)
ADC2_MODE3_D2 (BLOCK2) ??? ADC2 calibration 8 = -424 R/W (0xea)
ADC1_MODE0_D1 (BLOCK2) ??? ADC1 calibration 9 = 16 R/W (0b000100)
ADC1_MODE1_D1 (BLOCK2) ??? ADC1 calibration 10 = -80 R/W (0b110100)
ADC1_MODE2_D1 (BLOCK2) ??? ADC1 calibration 11 = -52 R/W (0b101101)
ADC1_MODE3_D1 (BLOCK2) ??? ADC1 calibration 12 = 4 R/W (0b000001)
ADC2_MODE0_D1 (BLOCK2) ??? ADC2 calibration 13 = -36 R/W (0b101001)
ADC2_MODE1_D1 (BLOCK2) ??? ADC2 calibration 14 = 12 R/W (0b000011)
ADC2_MODE2_D1 (BLOCK2) ??? ADC2 calibration 15 = -32 R/W (0b101000)
ADC2_MODE3_D1 (BLOCK2) ??? ADC2 calibration 16 = 60 R/W (0b001111)
Config fuses:
DIS_ICACHE (BLOCK0) Disables ICache = False R/W (0b0)
DIS_DCACHE (BLOCK0) Disables DCache = False R/W (0b0)
DIS_DOWNLOAD_ICACHE (BLOCK0) Disables Icache when SoC is in Download mode = True R/W (0b1)
DIS_DOWNLOAD_DCACHE (BLOCK0) Disables Dcache when SoC is in Download mode = True R/W (0b1)
DIS_FORCE_DOWNLOAD (BLOCK0) Disables forcing chip into Download mode = False R/W (0b0)
DIS_CAN (BLOCK0) Disables the TWAI Controller hardware = False R/W (0b0)
DIS_APP_CPU (BLOCK0) Disables APP CPU = False R/W (0b0)
FLASH_TPUW (BLOCK0) Configures flash startup delay after SoC power-up, = 0 R/W (0x0)
unit is (ms/2). When the value is 15, delay is 7.
5 ms
DIS_DIRECT_BOOT (BLOCK0) Disables direct boot mode = True R/W (0b1)
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) Disables USB-Serial-JTAG ROM printing = False R/W (0b0)
FLASH_ECC_MODE (BLOCK0) Configures the ECC mode for SPI flash
= 16-byte to 18-byte mode R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disables USB-Serial-JTAG download feature in UART = False R/W (0b0)
download boot mode
UART_PRINT_CONTROL (BLOCK0) Sets the default UART boot message output mode = Enabled R/W (0b00)
FLASH_TYPE (BLOCK0) Selects SPI flash type = 8 data lines R/W (0b1)
FLASH_PAGE_SIZE (BLOCK0) Sets the size of flash page = 0 R/W (0b00)
FLASH_ECC_EN (BLOCK0) Enables ECC in Flash boot mode = False R/W (0b0)
FORCE_SEND_RESUME (BLOCK0) Forces ROM code to send an SPI flash resume comman = False R/W (0b0)
d during SPI boot
DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0) Disables USB-OTG download feature in UART download = True R/W (0b1)
boot mode
DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
BLOCK_USR_DATA (BLOCK3) User data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Efuse fuses:
WR_DIS (BLOCK0) Disables programming of individual eFuses = 8388864 R/W (0x00800100)
RD_DIS (BLOCK0) Disables software reading from BLOCK4-10 = 1 R/W (0b0000001)
Identity fuses:
SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
ure)
MAC (BLOCK1) Factory MAC Address
= 7c:df:a1:fa:da:a8 (OK) R/W
WAFER_VERSION_MINOR_LO (BLOCK1) WAFER_VERSION_MINOR least significant bits = 1 R/W (0b001)
PKG_VERSION (BLOCK1) Package version = 0 R/W (0b000)
BLK_VERSION_MINOR (BLOCK1) BLOCK version minor = 2 R/W (0b010)
WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bits = 0 R/W (0b0)
WAFER_VERSION_MAJOR (BLOCK1) WAFER_VERSION_MAJOR = 0 R/W (0b00)
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
= 10 da 23 06 bb 2c 2d a2 43 d2 3a 66 d0 32 6a 51 R/W
BLK_VERSION_MAJOR (BLOCK2) BLOCK version major = With calibration R/W (0b01)
CUSTOM_MAC (BLOCK3) Custom MAC Address
= 00:00:00:00:00:00 (OK) R/W
WAFER_VERSION_MINOR (BLOCK0) calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI = 1 R/W (0x1)
<< 3 + WAFER_VERSION_MINOR_LO (read only)
Security fuses:
SOFT_DIS_JTAG (BLOCK0) Software disables JTAG by programming odd number o = 0 R/W (0b000)
f 1 bit(s). JTAG can be re-enabled via HMAC periph
eral
HARD_DIS_JTAG (BLOCK0) Hardware disables JTAG permanently = True R/W (0b1)
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Disables flash encryption when in download boot mo = False R/W (0b0)
des
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables encryption and decryption, when an SPI boo = Enable R/W (0b001)
t mode is set. Enabled when 1 or 3 bits are set,di
sabled otherwise
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revokes use of secure boot key digest 0 = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revokes use of secure boot key digest 1 = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revokes use of secure boot key digest 2 = False R/W (0b0)
KEY_PURPOSE_0 (BLOCK0) KEY0 purpose = XTS_AES_128_KEY R/- (0x4)
KEY_PURPOSE_1 (BLOCK0) KEY1 purpose = USER R/W (0x0)
KEY_PURPOSE_2 (BLOCK0) KEY2 purpose = USER R/W (0x0)
KEY_PURPOSE_3 (BLOCK0) KEY3 purpose = USER R/W (0x0)
KEY_PURPOSE_4 (BLOCK0) KEY4 purpose = USER R/W (0x0)
KEY_PURPOSE_5 (BLOCK0) KEY5 purpose = USER R/W (0x0)
SECURE_BOOT_EN (BLOCK0) Enables secure boot = False R/W (0b0)
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Enables aggressive secure boot key revocation mode = False R/W (0b0)
STRAP_JTAG_SEL (BLOCK0) Enable selection between usb_to_jtagor pad_to_jtag = False R/W (0b0)
through GPIO3
DIS_DOWNLOAD_MODE (BLOCK0) Disables all Download boot modes = False R/W (0b0)
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Enables secure UART download mode (read/write flas = False R/W (0b0)
h only)
BLOCK_KEY0 (BLOCK4)
Purpose: XTS_AES_128_KEY
Encryption key0 or user data
= ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/-
BLOCK_KEY1 (BLOCK5)
Purpose: USER
Encryption key1 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY2 (BLOCK6)
Purpose: USER
Encryption key2 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY3 (BLOCK7)
Purpose: USER
Encryption key3 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY4 (BLOCK8)
Purpose: USER
Encryption key4 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY5 (BLOCK9)
Purpose: USER
Encryption key5 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_SYS_DATA2 (BLOCK10) System data (part 2)
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Spi_Pad_Config fuses:
SPI_PAD_CONFIG_CLK (BLOCK1) SPI CLK pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_Q (BLOCK1) SPI Q (D1) pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_D (BLOCK1) SPI D (D0) pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_CS (BLOCK1) SPI CS pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_HD (BLOCK1) SPI HD (D3) pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_WP (BLOCK1) SPI WP (D2) pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_DQS (BLOCK1) SPI DQS pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_D4 (BLOCK1) SPI D4 pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_D5 (BLOCK1) SPI D5 pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_D6 (BLOCK1) SPI D6 pad = 0 R/W (0b000000)
SPI_PAD_CONFIG_D7 (BLOCK1) SPI D7 pad = 0 R/W (0b000000)
Usb Config fuses:
DIS_USB (BLOCK0) Disables the USB OTG hardware = False R/W (0b0)
USB_EXCHG_PINS (BLOCK0) Exchanges USB D+ and D- pins = False R/W (0b0)
EXT_PHY_ENABLE (BLOCK0) Enables external USB PHY = False R/W (0b0)
BTLC_GPIO_ENABLE (BLOCK0) Enables BTLC GPIO = 0 R/W (0b00)
DIS_USB_JTAG (BLOCK0) Disable usb_serial_jtag-to-jtag function = True R/W (0b1)
DIS_USB_SERIAL_JTAG (BLOCK0) Disable usb_serial_jtag module = False R/W (0b0)
USB_PHY_SEL (BLOCK0) Select internal/external PHY for USB OTGand usb_se = False R/W (0b0)
rial_jtag
Vdd_Spi Config fuses:
VDD_SPI_XPD (BLOCK0) The VDD_SPI regulator is powered on = True R/W (0b1)
VDD_SPI_TIEH (BLOCK0) The VDD_SPI power supply voltage at reset = Connect to 1.8V LDO R/W (0b0)
VDD_SPI_FORCE (BLOCK0) Force using VDD_SPI_XPD and VDD_SPI_TIEH to config = True R/W (0b1)
ure VDD_SPI LDO
PIN_POWER_SELECTION (BLOCK0) Sets default power supply for GPIO33..37 = VDD_SPI R/W (0b1)
Wdt Config fuses:
WDT_DELAY_SEL (BLOCK0) Selects RTC WDT timeout threshold at startup = 0 R/W (0b00)
Flash voltage (VDD_SPI) set to 1.8V by efuse.问题：
1. 都是默认设置，重启的原因？怎么解决？
2. 日志显示的这部分，是否正常？
Reading with esp_flash_read:
I (554) example: 0x3fcf3af0 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
I (554) example: 0x3fcf3b00 ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff |................|
十分感谢！