Using ESP32 for precise frequency measurement

[edigi32]

I'm building with ESP32 a high precision frequency meter. Under high precision I mean 7-8 digits. Later on I plan to use Neo-7N GPS receiver to calibrate and improve precision (via 1pps output; it works, tested already).
I've used RMT to generate gating signal and PCNT to count the signal to be measured. There are several examples of this on the net.

What I've noticed is (and also documented in this way) that PCNT does not do a direct counting but basically samples the signal to be counted with 80 MHz sampling frequency.
This means that it's difficult to measure signal around 40 MHz (half the sampling frequency) but I had no trouble going above of 40 MHz in which case naturally the pulses counted reflect a mirrored image. Thus e.g. 50 MHz is counted as 30 MHz and e.g. 100 MHz is counted as 20 MHz and so on.
The input pin is so good that I had no trouble going even till 150 MHz (roughly the maximum that AD9954 square output that I've used for the testing can generate). The values counted above 40 MHz are also still surprisingly precise, thus e.g a precise 100 MHz value is counted precisely as it were a 20 MHz signal.

So this brings up the big question: Is there a way in ESP32 to make direct counting of a TTL signal instead of this sampled method which unnecessarily limits the max. frequency of the counter?

[ESP_Sprite]

Unfortunately, no; as far as I know, all IO methods you could use to count pulses go through the GPIO matrix, which implicitly samples the signal at the APB clock frequency, which indeed is 80MHz. As a workaround, perhaps you could add an external divider?

[edigi32]

External divider (prescaler) is no issue and in fact I use it for higher frequency signals.

However I've tried to build reciprocal counter also where instead of RMT gating MCPWM capture is used (and capture interrupt with very tight timing to make gating synchronous with the signal to be measured) and found similar limit there as well.
Not surprisingly the capture also seem to run with 80 MHz clock (APB). So a similar limit seems to be there.

What I mean that the counting precision that can be achieved within a certain gating time is limited by the APB clock.

So I guess if some timer is to be triggered from some pin (I have not yet explored this) then also the triggering precision cannot be better than one APB clock cycle since it is also sampled then?

I'm fine with this (7-8 digits with sub second gating is good enough for me) and it's good to know that there is no point in searching any further so thank you for quick response.

[edigi32]

One more question related to MCPWM.

Would it be possible to force a one shot capture mode?

So what I mean that after the mcpwm_capture_enable is called and a single capture happens, ESP32 by its own would stop capturing of the given capture signal (counter still counting in the background, only the time stamping/capturing stopped).
(This could relief the ISR race to save the captured value in case of very frequent re-occurring signals/capture edges.)

Unfortunately I don't see much possibility of this based on the documentation but maybe I've missed something...