An error occurs when using the internal DAC and ADC with the classic HFP profile

Anton Gudkov
Posts: 5
Joined: Sat Nov 18, 2023 12:44 pm

An error occurs when using the internal DAC and ADC with the classic HFP profile

Postby Anton Gudkov » Sat Nov 18, 2023 1:11 pm

The hfp profile works great with the external es8388 codec on the lyrat 4.3 board. I would like to use the internal 8-bit DAC, but when opening an audio connection the following error occurs:

E (1466959) BT_APP_HF: bt_app_send_data_timer_cb xSemaphoreGive failed
W (1466965) BT_BTM: SCO xmit Q overflow, pkt dropped
E (1466975) BT_APP_HF: bt_app_send_data_timer_cb xSemaphoreGive failed
W (1466978) BT_BTM: stat 10
W (1466979) BT_BTM: SCO xmit Q overflow, pkt dropped
W (1466991) BT_BTM: stat 10

The internal DAC settings look like this:

static void internal_dac_init() {

dac_continuous_config_t cont_cfg = {
.chan_mask = DAC_CHANNEL_MASK_CH0,
.desc_num = 8,
.buf_size = 2048,
.freq_hz = 16000,
.offset = 127,
.clk_src = DAC_DIGI_CLK_SRC_APLL, // Using APLL as clock source to get a wider frequency range
/* Assume the data in buffer is 'A B C D E F'
* DAC_CHANNEL_MODE_SIMUL:
* - channel 0: A B C D E F
* - channel 1: A B C D E F
* DAC_CHANNEL_MODE_ALTER:
* - channel 0: A C E
* - channel 1: B D F
*/
.chan_mode = DAC_CHANNEL_MODE_SIMUL,
};

/* Allocate continuous channels */
ESP_ERROR_CHECK(dac_continuous_new_channels(&cont_cfg, &tx_chan));
/* Enable the continuous channels */
ESP_ERROR_CHECK(dac_continuous_enable(tx_chan));
}

So I'm trying to write data to the DAC that came from bluetooth:

static void bt_app_hf_incoming_cb(const uint8_t *buf, uint32_t sz)
{
esp_err_t err;
if(tx_chan) {
if ((err = dac_continuous_write(tx_chan, buf, sz, NULL, -1)) != ESP_OK) {
ESP_LOGI(BT_HF_TAG, "%s dont write data DAC: %s\n", __func__, esp_err_to_name(err));
return;
}
}
}

I use mSBC codec!!!

There is an assumption that the errors are related to the DAC settings. I found the following information in the documentation:

The clock of the DAC digital controller comes from I2S0 as well, so there are two clock sources for selection:

dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_PLL_D2 supports frequency between 19.6 KHz to several MHz. It is the default clock which can also be selected by dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_DEFAULT.

dac_continuous_digi_clk_src_t::DAC_DIGI_CLK_SRC_APLL supports frequency between 648 Hz to several MHz. However, it might be occupied by other peripherals, thus not providing the required frequency. In such case, this clock source is available only if APLL still can be correctly divided into the target DAC DMA frequency.

I understand correctly that the bluetooth SBC codec has taken over DAC_DIGI_CLK_SRC_APLL so the DAC is not stable. If not, then how to properly use the internal DAC with the HFP profile. Thank you in advance!

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