ESP32 SPI SCLK GPIO drive strength
Posted: Mon Feb 13, 2023 10:35 pm
I have a custom design using an ESP32 that will have the SPI SCLK fanning out to 3 SPI devices. I'm trying to set the drive strength of the GPIO used for the SPI SCLK to the maximum possible. I have code that looks like:
For testing purposes I have the ESP SPI bus communicating with a single TCAN4550 EVM. That works fine. The SCLK rise and fall time as observed on my scope is around 10 ns. That is with the SCLK connected directly to the 'scope and no longer connected to the TCAN4550. According to what I have observed, not calling gpio_set_drive_capability() and calling gpio_set_drive_capability() with GPIO_DRIVE_CAP_0 o GPIO_DRIVE_CAP_3 all give exactly the same SCLK rise and fall times. How do I actually adjust the SCLK drive strength?
Thanks,
Andrew
Code: Select all
#define CMGPIO_BR_SPI_SCLK GPIO_NUM_2
and
buscfg.miso_io_num = CMGPIO_BR_SPI_MISO;
buscfg.mosi_io_num = CMGPIO_BR_SPI_MOSI;
buscfg.sclk_io_num = CMGPIO_BR_SPI_SCLK;
buscfg.quadwp_io_num = -1;
buscfg.quadhd_io_num = -1;
buscfg.max_transfer_sz = TCAN4550_BUFFER_SIZE
after
ret = spi_bus_initialize(CMGPIO_CAN_BR_SPI_DEVICE, &buscfg, SPI_DMA_CH_AUTO);
have
ESP_ERROR_CHECK(gpio_set_drive_capability(CMGPIO_BR_SPI_SCLK, GPIO_DRIVE_CAP_0));
Thanks,
Andrew