hi guys
[no hurry]
determines it is written somewhere,
determined we known this before,
I'm sorry if I have to ask now:
which means in the log
pp 1
second is:
have we a list about priority tasks and what meaning they have and when each should be used
example
xTaskCreatePinnedToCore .|. xTaskCreate
thank you
best wishes
rudi;-)
[Q] pp 1 in the log and xTaskCreatePinnedToCore opposite to xTaskCreate
[Q] pp 1 in the log and xTaskCreatePinnedToCore opposite to xTaskCreate
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love it, change it or leave it.
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問候飛出去的朋友遍全球魯迪
love it, change it or leave it.
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問候飛出去的朋友遍全球魯迪
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Re: [Q] pp 1 in the log and xTaskCreatePinnedToCore opposite to xTaskCreate
I think the 'pp 1' is a debugging line that accidentally ended up in master. One of the next pushes will probably kill it.
xTaskCreatePinnedToCore can expicitly create a task that runs on one of the two CPU cores (last argument = 0 or 1) or without any affinity (=the core that has the least work to do will pick up the task). For now, pinning a task to a core probably is the best thing to do, we still have one or two small issues with tasks without affinity. I think xTaskCreate creates tasks without affinity.
xTaskCreatePinnedToCore can expicitly create a task that runs on one of the two CPU cores (last argument = 0 or 1) or without any affinity (=the core that has the least work to do will pick up the task). For now, pinning a task to a core probably is the best thing to do, we still have one or two small issues with tasks without affinity. I think xTaskCreate creates tasks without affinity.
Re: [Q] pp 1 in the log and xTaskCreatePinnedToCore opposite to xTaskCreate
@ESP_Sprite
Should we still default to pinning to core?
Should we still default to pinning to core?
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- Joined: Thu Nov 26, 2015 4:08 am
Re: [Q] pp 1 in the log and xTaskCreatePinnedToCore opposite to xTaskCreate
As far as I'm aware you should happily be able to create 'floating' tasks. Only exception are tasks that use the FPU: because we don't support moving the FPU registers around (because of some innate details on how the Xtensa coprocessor registers are handled) these will get automatically pinned to the core they run on when they execute their first FPU instruction.
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