8MB psram question
Posted: Tue Oct 15, 2019 4:43 pm
I have been toying with an AI Thinker module which has 8MB psram.
soc.h defines -
#define SOC_EXTRAM_DATA_LOW 0x3F800000
#define SOC_EXTRAM_DATA_HIGH 0x3FC00000
With psram installed it maps the 1st 4MB from SOC_DIRAM_DRAM_LOW (to 0x3FBFFFFF i think)
The rest of the ram in unused unless something like himem is added. (which reduces the end memory address (0x3FBC00000) to allow bit to allow for bank switching )
SOC_EXTRAM_DATA_HIGH memory address isn't used from what I can guess for this module.
So the idea is simply map the 1st 4MB to SOC_EXTRAM_DATA_LOW, and 2nd 4MB to SOC_EXTRAM_DATA_HIGH
Would the code changes indicated below be enough, or am missing something?
looking at spirim.c
Would the following 2 changes work, and if yes, would there any "badness" if it did?
ADD IN -> void IRAM_ATTR esp_spiram_init_cache()
cache_sram_mmu_set( 0, 0, SOC_EXTRAM_DATA_HIGH, 0, 32, 128 );
ADD IN (or create 2nd function for high bank )-> esp_err_t esp_spiram_add_to_heapalloc()
heap_caps_add_region((intptr_t)SOC_EXTRAM_DATA_HIGH, (intptr_t)SOC_EXTRAM_DATA_HIGH + spiram_size_usable_for_malloc()-1);
Not important, just interested if this approach has any merit, before pursuing further,
If something like this would work, you could have a total heap with > 8MB
thanx
soc.h defines -
#define SOC_EXTRAM_DATA_LOW 0x3F800000
#define SOC_EXTRAM_DATA_HIGH 0x3FC00000
With psram installed it maps the 1st 4MB from SOC_DIRAM_DRAM_LOW (to 0x3FBFFFFF i think)
The rest of the ram in unused unless something like himem is added. (which reduces the end memory address (0x3FBC00000) to allow bit to allow for bank switching )
SOC_EXTRAM_DATA_HIGH memory address isn't used from what I can guess for this module.
So the idea is simply map the 1st 4MB to SOC_EXTRAM_DATA_LOW, and 2nd 4MB to SOC_EXTRAM_DATA_HIGH
Would the code changes indicated below be enough, or am missing something?
looking at spirim.c
Code: Select all
void IRAM_ATTR esp_spiram_init_cache()
{
//Enable external RAM in MMU
cache_sram_mmu_set( 0, 0, SOC_EXTRAM_DATA_LOW, 0, 32, 128 );
//Flush and enable icache for APP CPU
#if !CONFIG_FREERTOS_UNICORE
DPORT_CLEAR_PERI_REG_MASK(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DRAM1);
cache_sram_mmu_set( 1, 0, SOC_EXTRAM_DATA_LOW, 0, 32, 128 );
#endif
}
esp_err_t esp_spiram_add_to_heapalloc()
{
//Add entire external RAM region to heap allocator. Heap allocator knows the capabilities of this type of memory, so there's
//no need to explicitly specify them.
#if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
ESP_EARLY_LOGI(TAG, "Adding pool of %dK of external SPI memory to heap allocator", (spiram_size_usable_for_malloc() - (&_ext_ram_bss_end - &_ext_ram_bss_start))/1024);
return heap_caps_add_region((intptr_t)&_ext_ram_bss_end, (intptr_t)SOC_EXTRAM_DATA_LOW + spiram_size_usable_for_malloc()-1);
#else
ESP_EARLY_LOGI(TAG, "Adding pool of %dK of external SPI memory to heap allocator", spiram_size_usable_for_malloc()/1024);
return heap_caps_add_region((intptr_t)SOC_EXTRAM_DATA_LOW, (intptr_t)SOC_EXTRAM_DATA_LOW + spiram_size_usable_for_malloc()-1);
#endif
}
ADD IN -> void IRAM_ATTR esp_spiram_init_cache()
cache_sram_mmu_set( 0, 0, SOC_EXTRAM_DATA_HIGH, 0, 32, 128 );
ADD IN (or create 2nd function for high bank )-> esp_err_t esp_spiram_add_to_heapalloc()
heap_caps_add_region((intptr_t)SOC_EXTRAM_DATA_HIGH, (intptr_t)SOC_EXTRAM_DATA_HIGH + spiram_size_usable_for_malloc()-1);
Not important, just interested if this approach has any merit, before pursuing further,
If something like this would work, you could have a total heap with > 8MB
thanx