Kaisha wrote: ↑Mon Jun 14, 2021 12:28 pm
That's interesting to know. I never really played with asm on vanilla since there was no official docs.
Any info on what type of vector instructions on esp32-s3? Perhaps a technical reference manual running around?
AFAIK, the S3 in therms of CPU architecture is exactly the same as the vanilla ESP32. The major differences are in other HW elements like bus handling, DMA, internal memory layout, MMU, peripherals and networking.
For MMU, the difference is for example that the internal memory layout is different (mixed usage 8-bit RAM), which means that all internal RAM now can be used for both executing functions (Like using IRAM_ATTR), but also for data (vanilla ESP32 had only 250kBish 8-bit RAM, the rest was 32-bit words used for CPU caches, and IRAM_ATTR functions, occasionally 32bit variables are placed there).
In the S3, you can also run apps from external RAM, which was a highly requested feature, and also more RAM can be used for mallocs, as well as the maximum flash size usable is also increased.
Additionally Octal-SPI ram and flash is usable alowing for much faster operation, and overall faster RAM access even on QSPI RAMs.
The I2S interface had a parallel mode in the vanilla ESP32, a separate peripheral has this function now, the LCD/CAM peripheral, which is nice
Frankly the S3 because a power house on paper, which is awsome, and much waited, at least in my eyes.
I'm sure, that soon someone will port a tiny Linux kernell on the S3, running form external RAM
In addition it has a Risc-V coprocessor, which is huge