I2S driver for ESP32 is not working
Posted: Tue Sep 14, 2021 3:28 am
Hello,
I have an external ADC connected to ESP32 devkit 4. I am using the I2S interface to read left/right channel data from external ADC.
Here, I2S in ESP32 will act as master and in RX mode. So, ESP32 will generate a master clock for synchronization. My sampling frequency is 96000.
I am using GPIO0 to generate the master clock. When I checked with IDF v4.3 it was clean and perfect.
However, I am going to use the ESP32-S3 module moving further, I have updated ESP-IDF to the master branch(v4.4).
I run the latest ESP-IDF master branch code in the ESP32 chip and checked the master clock on GPIO0 to validate clock signal, It is not coming as expected. The clock signal is clipped.
Find attached image file to see the clock signal for your reference.
I have ESP32-S3 devkits-1 v1.0, I am validating the same with it. But the problem with I2S in S3 is also same, the master clock is not coming as expected. the signal is clipped.
FYI, I am looking at the below link for what are features are supported in ESP32-S3. I2S mention in the supported list.
https://www.esp32.com/viewtopic.php?f=10&t=21906
Let us know how to resolve this issue for ESP32 and ESP32-S3 in the latest master branch.
I have an external ADC connected to ESP32 devkit 4. I am using the I2S interface to read left/right channel data from external ADC.
Here, I2S in ESP32 will act as master and in RX mode. So, ESP32 will generate a master clock for synchronization. My sampling frequency is 96000.
I am using GPIO0 to generate the master clock. When I checked with IDF v4.3 it was clean and perfect.
However, I am going to use the ESP32-S3 module moving further, I have updated ESP-IDF to the master branch(v4.4).
I run the latest ESP-IDF master branch code in the ESP32 chip and checked the master clock on GPIO0 to validate clock signal, It is not coming as expected. The clock signal is clipped.
Find attached image file to see the clock signal for your reference.
I have ESP32-S3 devkits-1 v1.0, I am validating the same with it. But the problem with I2S in S3 is also same, the master clock is not coming as expected. the signal is clipped.
FYI, I am looking at the below link for what are features are supported in ESP32-S3. I2S mention in the supported list.
https://www.esp32.com/viewtopic.php?f=10&t=21906
Let us know how to resolve this issue for ESP32 and ESP32-S3 in the latest master branch.