I2S: Samples incorrectly zeroed when I2S interface is in slave mode but not master mode

heartwerker
Posts: 2
Joined: Wed Aug 09, 2023 1:48 pm

Re: I2S: Samples incorrectly zeroed when I2S interface is in slave mode but not master mode

Postby heartwerker » Wed Aug 09, 2023 2:08 pm

Hey there,

I am experiencing the same problem of quasi-randomly appearing zero samples..
JB2050 wrote:
Sun Oct 07, 2018 9:23 pm
The sample zeroing problem appears to be sample rate dependent.
I confirm this! The pattern of how(often) the corrupted (zero)data is transmitted is also connected to how close the configured esp32 slave sample-rate matches the stm32 master sample-rate. (Using STM32H750 / Daisy Seed board which operates effectively at 48014 Hz: if I set the esp32 i2s slave sample-rate to 48013 Hz the zero samples appear more frequent).

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The previously proposed solution would not work for my setup. I want to connect two esp32 i2s tx slaves connected to one stm32 rx master -> i therefore can't "clock the remote (STM32) master I2S interface from the I2S0_CLK signal of" two ESP32s....

like JB said:
JB2050 wrote:
Tue Oct 09, 2018 4:58 pm
(clearly not all the I2S slaves in any given system can be the supplier of the master clock for the system)
Would love to understand if there is some solution/workaround to this problem....

heartwerker
Posts: 2
Joined: Wed Aug 09, 2023 1:48 pm

Re: I2S: Samples incorrectly zeroed when I2S interface is in slave mode but not master mode

Postby heartwerker » Fri Aug 11, 2023 12:46 pm

i checked with esp32-s3 - it seems with exact same firmware, it does not have these problems and works as expected. :)

Unfortunately, s3 does not have bluetooth audio A2DP capability... :(

wondering if it makes sense to should check other chip version of standard ESP32 (ESP32-DOWD, ESP32-DOWD-V3, ...etc) :?:

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