JTAG GPIO overlapping with SPI2/3 GPIO

[InterBilly]

Hi,

I am designing a circuit containing a ESP32-WROOM-32E, a W5500 SPI ethernet module and a pin header for JTAG debugging.
I noticed the pins for JTAG debugging are:
tms, tck, tdo, tdi
13, 16, 23, 12
And the pins for VSPI are:
mosi, miso, sclk, cs
23, 19, 18, 5
And the pins for HSPI are:
mosi, miso, sclk, cs
12, 12, 14, 15

There is considerable overlap between these pins, how can I have a JTAG debugger connected while using one (or both) of the SPI busses? I thought maybe the IO_MUX is meant to be used in these situations but wouldn't I just be rerouting the overlapping issue to another pin?

Any advice is greatly appreciated.

[ESP_Sprite]

Unless you need the absolute maximum SPI speeds, you can use the GPIO matrix to route the SPI pins to any available/compatible GPIO pin.