Need help on High-Level Interrupts
Posted: Wed May 25, 2022 4:44 pm
I'm trying to implement a high level interrupt to reduce the interrupt latency and jitter. The interrupt source is a GPIO that connects to pulse-per-second signal from a GPS module. I write the interrupt handler in assemble and register the interrupt in app_main with priority level 5. The code is attached below.
The problem is when I try to register the interrupt with level 5, it crashed at line, and the error message is
If I register the interrupt as level 3, the registration is successful but then it stuck somewhere in/after the interrupt handler. I've tried all the method I can think of, such as restoring the register values, loading EXCSAVE_3 or EXCSAVE_5 to A0, but none of them works. Could anyone give me some hint what should I do to fix it? Or any document/post I can read?
Exception message when register the interrupt with level 5 priority.
Code of "Main.c"
Code of interrupt handle
The problem is when I try to register the interrupt with level 5, it crashed at line
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gpio_isr_handler_add((gpio_num_t)PIN_PPS, xt_highint5, (void*) PIN_PPS);
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Core 0 panic'ed (LoadProhibited)
Exception message when register the interrupt with level 5 priority.
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Guru Meditation Error: Core 0 panic'ed (LoadProhibited). Exception was unhandled.
Core 0 register dump:
PC : 0x400e4e0f PS : 0x00060f33 A0 : 0x800d59ce A1 : 0x3ffb60d0
0x400e4e0f: esp_intr_get_cpu at C:/Espressif/esp/esp-idf/components/esp_hw_support/intr_alloc.c:704
A2 : 0x00000000 A3 : 0x3ffb2558 A4 : 0x00000020 A5 : 0x3ffb12a4
A6 : 0x3ffb722c A7 : 0x0000000c A8 : 0x800d5824 A9 : 0x3ffb6090
A10 : 0x3ff44000 A11 : 0x0000001b A12 : 0x00000001 A13 : 0x00060f23
A14 : 0x00000000 A15 : 0x00000000 SAR : 0x00000005 EXCCAUSE: 0x0000001c
EXCVADDR: 0x00000000 LBEG : 0x400014fd LEND : 0x4000150d LCOUNT : 0xfffffffa
Backtrace:0x400e4e0c:0x3ffb60d00x400d59cb:0x3ffb60f0 0x400d4a0f:0x3ffb6120 0x400e54fc:0x3ffb6140 0x40087a09:0x3ffb6160
0x400e4e0c: esp_intr_get_cpu at C:/Espressif/esp/esp-idf/components/esp_hw_support/intr_alloc.c:703
0x400d59cb: gpio_isr_handler_add at C:/Espressif/esp/esp-idf/components/driver/gpio.c:473
0x400d4a0f: app_main at C:\Espressif\esp\UGA_ESP32_C\build/../main/main.c:27
0x400e54fc: main_task at C:/Espressif/esp/esp-idf/components/freertos/port/port_common.c:129 (discriminator 2)
0x40087a09: vPortTaskWrapper at C:/Espressif/esp/esp-idf/components/freertos/port/xtensa/port.c:131
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#include <stdio.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "xtensa/core-macros.h"
#include "driver/timer.h"
#include "driver/gpio.h"
#include <driver/timer.h>
#define PIN_PPS 27
int32_t PPSCount_ASM[2];
void xt_highint5(void * arg);
void app_main(void)
{
PPSCount_ASM[0] = 0;
gpio_pad_select_gpio(PIN_PPS);
gpio_set_direction((gpio_num_t)PIN_PPS, GPIO_MODE_INPUT);
gpio_pullup_dis((gpio_num_t)PIN_PPS);
gpio_pulldown_dis((gpio_num_t)PIN_PPS);
gpio_set_intr_type((gpio_num_t)PIN_PPS, GPIO_INTR_POSEDGE); //rising edge
printf("Initial before PPS\r\n");
gpio_install_isr_service(ESP_INTR_FLAG_LEVEL5);
gpio_isr_handler_add((gpio_num_t)PIN_PPS, xt_highint5, (void*) PIN_PPS);
gpio_intr_enable((gpio_num_t)PIN_PPS);
printf("Initial after PPS\r\n");
while(1)
{
printf("\n%d",PPSCount_ASM[0]);
vTaskDelay(300/portTICK_PERIOD_MS);
}
return;
}
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#include <xtensa/coreasm.h>
#include <xtensa/corebits.h>
#include <xtensa/config/system.h>
#include "soc/gpio_reg.h"
#define DRDY_INT_PIN_BITMASK (1<<27) // GPIO27 as interrupt pin
.data
_l5_intr_stack:
.space 8
.section .iram1,"ax"
.global xt_highint5
.type xt_highint5,@function
.align 4
xt_highint5:
//save register values
movi a0, _l5_intr_stack
s32i a13, a0, 0
s32i a15, a0, 4
// cleare the interrupt status of GPIO27(used interrupt pint!)
movi a13, GPIO_STATUS_W1TC_REG
movi a15, DRDY_INT_PIN_BITMASK
s32i a15, a13, 0
movi a13, PPSCount_ASM
l32i a15, a13, 0
//memw
addi.n a15, a15, 4
s32i a15, a13, 0
//restore register values
movi a0, _l5_intr_stack
l32i a13, a0, 0
l32i a15, a0, 4
rsr a0, EXCSAVE_3
rfi 3
.global ld_include_highint_hdl_my
ld_include_highint_hdl_my: