UART intterupt example?

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venkatesha kj
Posts: 7
Joined: Thu Mar 03, 2022 6:27 am

UART intterupt example?

Postby venkatesha kj » Thu Mar 03, 2022 7:21 am

Code: Select all

/* 
UART Interrupt Example
*/
#include <stdio.h>
#include <string.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "driver/uart.h"
#include "esp_log.h"
#include "driver/gpio.h"
#include "sdkconfig.h"
#include "esp_intr_alloc.h"
#include "soc/uart_struct.h"



#define BLINK_GPIO GPIO_NUM_2

static const char *TAG = "uart_events";

/**
 * This example shows how to use the UART driver to handle UART interrupt.
 *
 * - Port: UART0
 * - Receive (Rx) buffer: on
 * - Transmit (Tx) buffer: off
 * - Flow control: off
 * - Event queue: on
 * - Pin assignment: TxD (default), RxD (default)
 */

#define EX_UART_NUM UART_NUM_0
#define PATTERN_CHR_NUM    (3)         /*!< Set the number of consecutive and identical characters received by receiver which defines a UART pattern*/

#define BUF_SIZE (1024)
#define RD_BUF_SIZE (BUF_SIZE)

#define UART_RXFIFO_FULL_INT_CLR        0
#define UART_RXFIFO_TOUT_INT_CLR        0
static QueueHandle_t uart0_queue;

// Both definition are same and valid
//static uart_isr_handle_t *handle_console;
static intr_handle_t handle_console;

// Receive buffer to collect incoming data
uint8_t rxbuf[256];
// Register to collect data length
uint16_t urxlen;



#define NOTASK 0

void blink_task(void *pvParameter)
{
    gpio_pad_select_gpio(BLINK_GPIO);
    
    /* Set the GPIO as a push/pull output */
    gpio_set_direction(BLINK_GPIO, GPIO_MODE_OUTPUT);
    
    while(1) {
        /* Blink off (output low) */
        gpio_set_level(BLINK_GPIO, 0);
        vTaskDelay(1000 / portTICK_PERIOD_MS);
        /* Blink on (output high) */
        gpio_set_level(BLINK_GPIO, 1);
        vTaskDelay(1000 / portTICK_PERIOD_MS);
    }
}
/*
 * Define UART interrupt subroutine to ackowledge interrupt
 */
static void IRAM_ATTR uart_intr_handle(void *arg)
{
  uint16_t rx_fifo_len, status;
  uint16_t i=0;
  
  status = UART0.int_st.val; // read UART interrupt Status
  rx_fifo_len = UART0.status.rxfifo_cnt; // read number of bytes in UART buffer
  
  while(rx_fifo_len){
   rxbuf[i++] = UART0.fifo.rw_byte; // read all bytes
   rx_fifo_len--;
 }
  
 // after reading bytes from buffer clear UART interrupt status
 uart_clear_intr_status(EX_UART_NUM, UART_RXFIFO_FULL_INT_CLR|UART_RXFIFO_TOUT_INT_CLR);

// a test code or debug code to indicate UART receives successfully,
// you can redirect received byte as echo also
 uart_write_bytes(EX_UART_NUM, (const char*) "RX Done", 7);

}
/*
 * main 
 */
void app_main()
{
	int ret;
	esp_log_level_set(TAG, ESP_LOG_INFO);

	/* Configure parameters of an UART driver,
	* communication pins and install the driver */
	uart_config_t uart_config = {
		.baud_rate = 115200,
		.data_bits = UART_DATA_8_BITS,
		.parity = UART_PARITY_DISABLE,
		.stop_bits = UART_STOP_BITS_1,
		.flow_ctrl = UART_HW_FLOWCTRL_DISABLE
	};

	ESP_ERROR_CHECK(uart_param_config(EX_UART_NUM, &uart_config));

	//Set UART log level
	esp_log_level_set(TAG, ESP_LOG_INFO);

	//Set UART pins (using UART0 default pins ie no changes.)
	ESP_ERROR_CHECK(uart_set_pin(EX_UART_NUM, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));

	//Install UART driver, and get the queue.
	ESP_ERROR_CHECK(uart_driver_install(EX_UART_NUM, BUF_SIZE * 2, 0, 0, NULL, 0));

	// release the pre registered UART handler/subroutine
	ESP_ERROR_CHECK(uart_isr_free(EX_UART_NUM));

	// register new UART subroutine
	ESP_ERROR_CHECK(uart_isr_register(EX_UART_NUM,uart_intr_handle, NULL, ESP_INTR_FLAG_IRAM, &handle_console));

	// enable RX interrupt
	ESP_ERROR_CHECK(uart_enable_rx_intr(EX_UART_NUM));
	#if (NOTASK == 1)
	while(1)
	{
		vTaskDelay(1000);
	}
	#else
		//xTaskCreate(&blink_task, "blink_task", configMINIMAL_STACK_SIZE, NULL, 5, NULL);
	#endif
}
i am trying to receive the data when ever rxfifo intterupt triggered but system rebooted why?

Code: Select all

ets Jun  8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:7580
ho 0 tail 12 room 4
load:0x40078000,len:15360
load:0x40080400,len:3744
entry 0x4008067c
I (29) boot: ESP-IDF 4.3.2 2nd stage bootloader
I (29) boot: compile time 11:17:27
I (29) boot: chip revision: 1
I (32) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (39) boot.esp32: SPI Speed      : 40MHz
I (43) boot.esp32: SPI Mode       : DIO
I (48) boot.esp32: SPI Flash Size : 4MB
I (52) boot: Enabling RNG early entropy source...
I (58) boot: Partition Table:
I (61) boot: ## Label            Usage          Type ST Offset   Length
I (69) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (76) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (84) boot:  2 factory          factory app      00 00 00010000 00100000
I (91) boot: End of partition table
I (95) boot_comm: chip revision: 1, min. application chip revision: 0
I (102) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=08c64h ( 35940)                                                                                                              map
I (125) esp_image: segment 1: paddr=00018c8c vaddr=3ffb0000 size=02988h ( 10632)                                                                                                              load
I (129) esp_image: segment 2: paddr=0001b61c vaddr=40080000 size=049fch ( 18940)                                                                                                              load
I (139) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=169c4h ( 92612)                                                                                                              map
I (174) esp_image: segment 4: paddr=000369ec vaddr=400849fc size=07e04h ( 32260)                                                                                                              load
I (189) esp_image: segment 5: paddr=0003e7f8 vaddr=50000000 size=00010h (    16)                                                                                                              load
I (195) boot: Loaded app from partition at offset 0x10000
I (195) boot: Disabling RNG early entropy source...
I (209) cpu_start: Pro cpu up.
I (209) cpu_start: Starting app cpu, entry point is 0x400816a0
I (0) cpu_start: App cpu up.
I (223) cpu_start: Pro cpu start user code
I (223) cpu_start: cpu freq: 160000000
I (223) cpu_start: Application information:
I (228) cpu_start: Project name:     CAN_data_logger
I (233) cpu_start: App version:      1
I (238) cpu_start: Compile time:     Mar  3 2022 11:16:12
I (244) cpu_start: ELF file SHA256:  720995ed363712ef...
I (250) cpu_start: ESP-IDF:          4.3.2
I (255) heap_init: Initializing. RAM available for dynamic allocation:
I (262) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (268) heap_init: At 3FFB3368 len 0002CC98 (179 KiB): DRAM
I (274) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (280) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (287) heap_init: At 4008C800 len 00013800 (78 KiB): IRAM
I (294) spi_flash: detected chip: generic
I (298) spi_flash: flash io: dio
RX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX                                                                                                              DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX Don
ets Jun  8 2016 00:22:57

rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:7580
ho 0 tail 12 room 4
load:0x40078000,len:15360
load:0x40080400,len:3744
entry 0x4008067c
I (57) boot: ESP-IDF 4.3.2 2nd stage bootloader
I (58) boot: compile time 11:17:27
I (58) boot: chip revision: 1
I (61) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (68) boot.esp32: SPI Speed      : 40MHz
I (73) boot.esp32: SPI Mode       : DIO
I (77) boot.esp32: SPI Flash Size : 4MB
W (82) boot.esp32: PRO CPU has been reset by WDT.
W (87) boot.esp32: WDT reset info: PRO CPU PC=0x400891ae
W (93) boot.esp32: WDT reset info: APP CPU PC=0x400882f0
I (99) boot: Enabling RNG early entropy source...
I (104) boot: Partition Table:
I (108) boot: ## Label            Usage          Type ST Offset   Length
I (115) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (123) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (131) boot:  2 factory          factory app      00 00 00010000 00100000
I (138) boot: End of partition table
I (142) boot_comm: chip revision: 1, min. application chip revision: 0
I (150) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=08c64h ( 35940) map
I (172) esp_image: segment 1: paddr=00018c8c vaddr=3ffb0000 size=02988h ( 10632) load
I (177) esp_image: segment 2: paddr=0001b61c vaddr=40080000 size=049fch ( 18940) load
I (186) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=169c4h ( 92612) map
I (222) esp_image: segment 4: paddr=000369ec vaddr=400849fc size=07e04h ( 32260) load
I (236) esp_image: segment 5: paddr=0003e7f8 vaddr=50000000 size=00010h (    16) load
I (243) boot: Loaded app from partition at offset 0x10000
I (243) boot: Disabling RNG early entropy source...
I (256) cpu_start: Pro cpu up.
I (256) cpu_start: Starting app cpu, entry point is 0x400816a0
I (0) cpu_start: App cpu up.
I (270) cpu_start: Pro cpu start user code
I (270) cpu_start: cpu freq: 160000000
I (270) cpu_start: Application information:
I (275) cpu_start: Project name:     CAN_data_logger
I (281) cpu_start: App version:      1
I (285) cpu_start: Compile time:     Mar  3 2022 11:16:12
I (291) cpu_start: ELF file SHA256:  720995ed363712ef...
I (297) cpu_start: ESP-IDF:          4.3.2
I (302) heap_init: Initializing. RAM available for dynamic allocation:
I (309) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (315) heap_init: At 3FFB3368 len 0002CC98 (179 KiB): DRAM
I (321) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (328) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (334) heap_init: At 4008C800 len 00013800 (78 KiB): IRAM
I (342) spi_flash: detected chip: generic
I (345) spi_flash: flash io: dio
RX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX Donets Jun  8 2016 00:22:57

rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:7580
ho 0 tail 12 room 4
load:0x40078000,len:15360
load:0x40080400,len:3744
entry 0x4008067c
I (57) boot: ESP-IDF 4.3.2 2nd stage bootloader
I (58) boot: compile time 11:17:27
I (58) boot: chip revision: 1
I (61) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (68) boot.esp32: SPI Speed      : 40MHz
I (73) boot.esp32: SPI Mode       : DIO
I (77) boot.esp32: SPI Flash Size : 4MB
W (82) boot.esp32: PRO CPU has been reset by WDT.
W (87) boot.esp32: WDT reset info: PRO CPU PC=0x400891b0
W (93) boot.esp32: WDT reset info: APP CPU PC=0x400882f2
I (99) boot: Enabling RNG early entropy source...
I (104) boot: Partition Table:
I (108) boot: ## Label            Usage          Type ST Offset   Length
I (115) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (123) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (131) boot:  2 factory          factory app      00 00 00010000 00100000
I (138) boot: End of partition table
I (142) boot_comm: chip revision: 1, min. application chip revision: 0
I (150) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=08c64h ( 35940) map
I (172) esp_image: segment 1: paddr=00018c8c vaddr=3ffb0000 size=02988h ( 10632) load
I (177) esp_image: segment 2: paddr=0001b61c vaddr=40080000 size=049fch ( 18940) load
I (186) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=169c4h ( 92612) map
I (222) esp_image: segment 4: paddr=000369ec vaddr=400849fc size=07e04h ( 32260) load
I (236) esp_image: segment 5: paddr=0003e7f8 vaddr=50000000 size=00010h (    16) load
I (243) boot: Loaded app from partition at offset 0x10000
I (243) boot: Disabling RNG early entropy source...
I (256) cpu_start: Pro cpu up.
I (256) cpu_start: Starting app cpu, entry point is 0x400816a0
I (0) cpu_start: App cpu up.
I (270) cpu_start: Pro cpu start user code
I (270) cpu_start: cpu freq: 160000000
I (270) cpu_start: Application information:
I (275) cpu_start: Project name:     CAN_data_logger
I (281) cpu_start: App version:      1
I (285) cpu_start: Compile time:     Mar  3 2022 11:16:12
I (291) cpu_start: ELF file SHA256:  720995ed363712ef...
I (297) cpu_start: ESP-IDF:          4.3.2
I (302) heap_init: Initializing. RAM available for dynamic allocation:
I (309) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (315) heap_init: At 3FFB3368 len 0002CC98 (179 KiB): DRAM
I (321) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (328) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (334) heap_init: At 4008C800 len 00013800 (78 KiB): IRAM
I (342) spi_flash: detected chip: generic
I (345) spi_flash: flash io: dio
RX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX Donets Jun  8 2016 00:22:57

rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:7580
ho 0 tail 12 room 4
load:0x40078000,len:15360
load:0x40080400,len:3744
entry 0x4008067c
I (57) boot: ESP-IDF 4.3.2 2nd stage bootloader
I (58) boot: compile time 11:17:27
I (58) boot: chip revision: 1
I (61) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (68) boot.esp32: SPI Speed      : 40MHz
I (73) boot.esp32: SPI Mode       : DIO
I (77) boot.esp32: SPI Flash Size : 4MB
W (82) boot.esp32: PRO CPU has been reset by WDT.
W (87) boot.esp32: WDT reset info: PRO CPU PC=0x400891aa
W (93) boot.esp32: WDT reset info: APP CPU PC=0x400882fe
I (99) boot: Enabling RNG early entropy source...
I (104) boot: Partition Table:
I (108) boot: ## Label            Usage          Type ST Offset   Length
I (115) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (123) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (131) boot:  2 factory          factory app      00 00 00010000 00100000
I (138) boot: End of partition table
I (142) boot_comm: chip revision: 1, min. application chip revision: 0
I (150) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=08c64h ( 35940) map
I (172) esp_image: segment 1: paddr=00018c8c vaddr=3ffb0000 size=02988h ( 10632) load
I (177) esp_image: segment 2: paddr=0001b61c vaddr=40080000 size=049fch ( 18940) load
I (186) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=169c4h ( 92612) map
I (222) esp_image: segment 4: paddr=000369ec vaddr=400849fc size=07e04h ( 32260) load
I (236) esp_image: segment 5: paddr=0003e7f8 vaddr=50000000 size=00010h (    16) load
I (243) boot: Loaded app from partition at offset 0x10000
I (243) boot: Disabling RNG early entropy source...
I (256) cpu_start: Pro cpu up.
I (256) cpu_start: Starting app cpu, entry point is 0x400816a0
I (0) cpu_start: App cpu up.
I (270) cpu_start: Pro cpu start user code
I (270) cpu_start: cpu freq: 160000000
I (270) cpu_start: Application information:
I (275) cpu_start: Project name:     CAN_data_logger
I (281) cpu_start: App version:      1
I (285) cpu_start: Compile time:     Mar  3 2022 11:16:12
I (291) cpu_start: ELF file SHA256:  720995ed363712ef...
I (297) cpu_start: ESP-IDF:          4.3.2
I (302) heap_init: Initializing. RAM available for dynamic allocation:
I (309) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (315) heap_init: At 3FFB3368 len 0002CC98 (179 KiB): DRAM
I (321) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (328) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (334) heap_init: At 4008C800 len 00013800 (78 KiB): IRAM
I (342) spi_flash: detected chip: generic
I (345) spi_flash: flash io: dio
RX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX DoneRX Donets Jun  8 2016 00:22:57

rst:0x7 (TG0WDT_SYS_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:7580
ho 0 tail 12 room 4
load:0x40078000,len:15360
load:0x40080400,len:3744
entry 0x4008067c
I (57) boot: ESP-IDF 4.3.2 2nd stage bootloader
I (58) boot: compile time 11:17:27
I (58) boot: chip revision: 1
I (61) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (68) boot.esp32: SPI Speed      : 40MHz
I (73) boot.esp32: SPI Mode       : DIO
I (77) boot.esp32: SPI Flash Size : 4MB
W (82) boot.esp32: PRO CPU has been reset by WDT.
W (87) boot.esp32: WDT reset info: PRO CPU PC=0x400891b0
W (93) boot.esp32: WDT reset info: APP CPU PC=0x400882f0
I (99) boot: Enabling RNG early entropy source...
I (104) boot: Partition Table:
I (108) boot: ## Label            Usage          Type ST Offset   Length
I (115) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (123) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (131) boot:  2 factory          factory app      00 00 00010000 00100000
I (138) boot: End of partition table
I (142) boot_comm: chip revision: 1, min. application chip revision: 0
I (150) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=08c64h ( 35940) map
I (172) esp_image: segment 1: paddr=00018c8c vaddr=3ffb0000 size=02988h ( 10632) load
I (177) esp_image: segment 2: paddr=0001b61c vaddr=40080000 size=049fch ( 18940) load
I (186) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=169c4h ( 92612) map
I (222) esp_image: segment 4: paddr=000369ec vaddr=400849fc size=07e04h ( 32260) load
I (236) esp_image: segment 5: paddr=0003e7f8 vaddr=50000000 size=00010h (    16) load
I (243) boot: Loaded app from partition at offset 0x10000
I (243) boot: Disabling RNG early entropy source...
I (256) cpu_start: Pro cpu up.
I (256) cpu_start: Starting app cpu, entry point is 0x400816a0
I (0) cpu_start: App cpu up.
I (270) cpu_start: Pro cpu start user code
I (270) cpu_start: cpu freq: 160000000
I (270) cpu_start: Application information:
I (275) cpu_start: Project name:     CAN_data_logger
I (281) cpu_start: App version:      1
I (285) cpu_start: Compile time:     Mar  3 2022 11:16:12
I (291) cpu_start: ELF file SHA256:  720995ed363712ef...
I (297) cpu_start: ESP-IDF:          4.3.2
I (302) heap_init: Initializing. RAM available for dynamic allocation:
I (309) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (315) heap_init: At 3FFB3368 len 0002CC98 (179 KiB): DRAM
I (321) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (328) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (334) heap_init: At 4008C800 len 00013800 (78 KiB): IRAM
I (342) spi_flash: detected chip: generic
I (345) spi_flash: flash io: dio
Top
nickbits
Posts: 7
Joined: Tue Jul 27, 2021 4:58 am

Re: UART intterupt example?

Postby nickbits » Thu Mar 10, 2022 4:30 am

I don't think you can call uart_write_bytes from an ISR.
If that's not it, throw some esp_printf()s around every line and see which one is causing the reboot.
Top
zazas321
Posts: 231
Joined: Mon Feb 01, 2021 9:41 am

Re: UART intterupt example?

Postby zazas321 » Tue Sep 13, 2022 1:13 pm

Did you figure out the issue in the end? I am trying to configure ISR for UART rx and came across your forum thread. Tried out your code and have same issue. (CPU crash whenever I try to send some data)
Top
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