eth2ap gets ethernet link down and up repeatedly

[biterror]

I'm afraid I have run into this same problem, see viewtopic.php?f=13&t=37757

I'm using a LAN8710A PHY and get the PHY clock from GPIO17. Has anyone found a solution to this problem? I have several hundred boards out there - didn't notice the problem before because we were using Ethernet only (no WIFI). Can't change the hardware now.

[second.string]

I know this is not an active thread, and i know it's related to the simultaneous use of wifi + ethernet, but I wanted to drop a different solution here in case anyone else was having the same problem as me.

I also was seeing odd behaviour with link up / down repeatedly. When connected directly to a computer ethernet port, after 2 or 3 link up/down cycles, it would remain up and there would be a bit of traffic from the laptop sending a bunch of discovery packets. When connected to a router, it would go up/down forever. I could never get an IP assigned, and setting a static IP helped get incomplete TCP packets to a laptop but nothing actually working. Clock was sourced from the LAN8720 using a 25MHz oscillator, and fed into the ESP32 through IO0.

My issue was that I was using a 12R1 bias resistor for the LAN8720A instead of a 12k1 resistor. This was causing VDDCR, the internal voltage regulator level, to be at 1V8 on the output pin. Once I swapped to the correct resistor, everything works flawlessly.

Only mentioning here in case someone else is as frustrated as I have been, since I haven't seen this mentioned anywhere else.

[ESP_ondrej]

The observed issue with generated CLK stability is unfortunately a real issue... ESP32 cannot be used as RMII CLK source when Wi-Fi is used. The only workaround is to not use Wi-Fi or use external source of the CLK

We are deeply sorry for trouble caused. We at least updated errata https://www.espressif.com/sites/default ... ata_en.pdf, Section 3.22. The TRM is also planning to be updated to make the limitation clearly visible.