ESP32 SPI slave low level half-duplex driver

[doragasu]

On previous projects, I was using the ESP8266 in slave 4-wire half-duplex mode. Now I have moved to ESP32 and have discovered that the supplied slave driver cannot work in half-duplex mode (it seems there is a half duplex driver in the works, but it is not available for ESP32 yet, and it seems it is not based on the 4 basic commands to read/write data and read/write status register. So I started writing my own driver for ESP32.

I am having many problems, but the main one right now I don't get how to fix is that it seems I am not configuring properly the input/output pins. I am using HSPI (SPI2) and configured the pins to go through the IO_MUX (and not use the GPIO matrix):
* CS0: GPIO15
* SCLK: GPIO14
* MISO (Q): GPIO12
* MOSI (D): GPIO13

I browsed the configuration for the slave driver (in driver/spi_common.c) and copied what it is doing to initialize the IO_MUX:

Code: Select all

            host = SPI2_HOST;
            
            gpio_iomux_in(13, spi_periph_signal[host].spid_in);
            gpio_iomux_out(13, spi_periph_signal[host].func, false);
            
            gpio_iomux_in(12, spi_periph_signal[host].spiq_in);
            gpio_iomux_out(12, spi_periph_signal[host].func, false);
            
            gpio_iomux_in(14, spi_periph_signal[host].spiclk_in);
            gpio_iomux_out(14, spi_periph_signal[host].func, false);
            
            gpio_iomux_in(15, spi_periph_signal[host].spics_in);
            gpio_iomux_out(15, spi_periph_signal[host].func, false);

Also among others, I enable slave mode (SPI2.slave.slave_mode = true), but it seems GPIO pins are not properly configured. For example MISO pin is kept in high impedance (but it is an output so it should be internally connected) and the CS0 pin is kept high with low impedance (but it should be an input!). So it seems like if pins were configured for a master interface. Why is this happening, am I missing something?

Things I tried:
* I have verified the spi_periph_signal values for the *_in are as expected (MOSI: 10, MISO: 9, SCLK 8, CS0 11).
* Surprisingly, I suspect spi_periph_signal[host].func is wrong. It is set to value 1, but shouldn't it be configured to Function 2? Anyway I have also tried setting it to function 2 and didn't work either:


* I have also tried setting the pins through the GPIO matrix instead of the IO_MUX, also without success. I suspect I am missing a step to make the pins "realize" they are in slave mode and not in master mode, but no matter how many times I read the reference manual, I cannot find it.

How can I configure these pins for the HSPI slave interface?