Running a Devkit Wrover B using VSCode getting the U8G2 example code running an SPI SSD1306 - tested the board with Arduino and sample code there and it all works fine.
When trying to get it working for my main project:
Example code:
Code: Select all
#include <driver/gpio.h>
#include <driver/spi_master.h>
#include <esp_log.h>
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <stdio.h>
#include <string.h>
#include <u8g2.h>
#include "driver/spi_master.h"
#include "sdkconfig.h"
#include "u8g2_esp32_hal.h"
#define PIN_CLK 18 // CLK - GPIO14
#define PIN_MOSI 23 // MOSI - GPIO 13
#define PIN_RESET 0 // RESET - GPIO 26
#define PIN_DC 4 // DC - GPIO 27
#define PIN_CS 12 // CS - GPIO 15
static char tag[] = "test_SSD1306";
void task_test_SSD1306(void *ignore) {
u8g2_esp32_hal_t u8g2_esp32_hal = U8G2_ESP32_HAL_DEFAULT;
u8g2_esp32_hal.clk = PIN_CLK;
u8g2_esp32_hal.mosi = PIN_MOSI;
u8g2_esp32_hal.cs = PIN_CS;
u8g2_esp32_hal.dc = PIN_DC;
u8g2_esp32_hal.reset = PIN_RESET;
u8g2_esp32_hal_init(u8g2_esp32_hal);
/*
u8g2_t u8g2;
ESP_LOGI(tag, "SetupDisplay!");
u8g2_Setup_ssd1306_128x64_noname_f(
&u8g2,
U8G2_R0,
u8g2_esp32_spi_byte_cb,
u8g2_esp32_gpio_and_delay_cb);
*/
u8g2_t u8g2;
u8g2_Setup_ssd1306_128x64_noname_f(
&u8g2,
U8G2_R0,
u8g2_esp32_spi_byte_cb,
u8g2_esp32_gpio_and_delay_cb);
u8g2_InitDisplay(&u8g2); // send init sequence to the display, display is in sleep mode after this,
u8g2_SetPowerSave(&u8g2, 0); // wake up display
u8g2_ClearBuffer(&u8g2);
u8g2_DrawBox(&u8g2, 10,20, 20, 30);
u8g2_SetFont(&u8g2, u8g2_font_ncenB14_tr);
u8g2_DrawStr(&u8g2, 0,15,"Hello World!");
u8g2_SendBuffer(&u8g2);
ESP_LOGD(tag, "All done!");
vTaskDelete(NULL);
}
Code: Select all
E (348) spi: spi_bus_initialize(500): intr flag not allowed
E (358) err: esp_err_t = 258
assertion "0 && "spi_bus_initialize(HSPI_HOST, &bus_config, 1)"" failed: file "../main/u8g2_esp32_hal.c", line 56, function: u8g2_esp32_spi_byte_cbCode: Select all
ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:6972
ho 0 tail 12 room 4
load:0x40078000,len:14336
load:0x40080400,len:3672
0x40080400: _init at ??:?
entry 0x40080678
I (29) boot: ESP-IDF v4.4-dev-4-g73db14240 2nd stage bootloader
I (29) boot: compile time 15:43:47
I (29) boot: chip revision: 1
I (33) boot_comm: chip revision: 1, min. bootloader chip revision: 0
I (40) boot.esp32: SPI Speed : 40MHz
I (45) boot.esp32: SPI Mode : DIO
I (49) boot.esp32: SPI Flash Size : 16MB
I (54) boot: Enabling RNG early entropy source...
I (59) boot: Partition Table:
I (63) boot: ## Label Usage Type ST Offset Length
I (70) boot: 0 nvs WiFi data 01 02 00009000 00006000
I (78) boot: 1 phy_init RF data 01 01 0000f000 00001000
I (85) boot: 2 factory factory app 00 00 00010000 00100000
I (93) boot: End of partition table
I (97) boot_comm: chip revision: 1, min. application chip revision: 0
I (104) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=09f4ch ( 40780) map
I (127) esp_image: segment 1: paddr=00019f74 vaddr=3ffbdb60 size=02ba4h ( 11172) load
I (131) esp_image: segment 2: paddr=0001cb20 vaddr=40080000 size=034f8h ( 13560) load
I (138) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=1a81ch (108572) map
I (179) esp_image: segment 4: paddr=0003a844 vaddr=400834f8 size=09818h ( 38936) load
I (203) boot: Loaded app from partition at offset 0x10000
I (203) boot: Disabling RNG early entropy source...
I (214) cpu_start: Pro cpu up.
I (214) cpu_start: Starting app cpu, entry point is 0x40081150
0x40081150: call_start_cpu1 at /Users/colinives/esp/esp-idf/components/esp_system/port/cpu_start.c:143
I (0) cpu_start: App cpu up.
I (228) cpu_start: Pro cpu start user code
I (229) cpu_start: cpu freq: 160000000
I (229) cpu_start: Application information:
I (233) cpu_start: Project name: switch
I (238) cpu_start: App version: 2.1
I (242) cpu_start: Compile time: Mar 9 2021 15:43:27
I (249) cpu_start: ELF file SHA256: 1194fa2d6c78e63f...
I (255) cpu_start: ESP-IDF: v4.4-dev-4-g73db14240
I (261) heap_init: Initializing. RAM available for dynamic allocation:
I (268) heap_init: At 3FFAE6E0 len 0000F480 (61 KiB): DRAM
I (274) heap_init: At 3FFC1AA0 len 0001E560 (121 KiB): DRAM
I (280) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (287) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (293) heap_init: At 4008CD10 len 000132F0 (76 KiB): IRAM
I (300) spi_flash: detected chip: gd
I (304) spi_flash: flash io: dio
I (309) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (318) test_SSD1306: Display
I (318) gpio: GPIO[0]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 1| Intr:0
I (328) gpio: GPIO[4]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 1| Intr:0
I (338) gpio: GPIO[12]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 1| Intr:0
E (348) spi: spi_bus_initialize(500): intr flag not allowed
E (358) err: esp_err_t = 258
assertion "0 && "spi_bus_initialize(HSPI_HOST, &bus_config, 1)"" failed: file "../main/u8g2_esp32_hal.c", line 56, function: u8g2_esp32_spi_byte_cb
abort() was called at PC 0x400dae73 on core 0
0x400dae73: __assert_func at /builds/idf/crosstool-NG/.build/HOST-x86_64-apple-darwin12/xtensa-esp32-elf/src/newlib/newlib/libc/stdlib/assert.c:62 (discriminator 8)
Backtrace:0x40085973:0x3ffb23b0 0x40085fbd:0x3ffb23d0 0x4008bc12:0x3ffb23f0 0x400dae73:0x3ffb2460 0x400d5e5e:0x3ffb2490 0x400d680b:0x3ffb2500 0x400d612a:0x3ffb2520 0x400d6b01:0x3ffb2540 0x400e99dd:0x3ffb2560 0x400d5d68:0x3ffb2580 0x400d5daf:0x3ffb2670 0x400ea560:0x3ffb2690 0x4008907d:0x3ffb26b0
0x40085973: panic_abort at /Users/colinives/esp/esp-idf/components/esp_system/panic.c:356
0x40085fbd: esp_system_abort at /Users/colinives/esp/esp-idf/components/esp_system/system_api.c:112
0x4008bc12: abort at /Users/colinives/esp/esp-idf/components/newlib/abort.c:46
0x400dae73: __assert_func at /builds/idf/crosstool-NG/.build/HOST-x86_64-apple-darwin12/xtensa-esp32-elf/src/newlib/newlib/libc/stdlib/assert.c:62 (discriminator 8)
0x400d5e5e: u8g2_esp32_spi_byte_cb at /Users/colinives/esp/u8g2-esp_idf-example/build/../main/u8g2_esp32_hal.c:56 (discriminator 5)
0x400d680b: u8x8_cad_001 at /Users/colinives/esp/esp-idf/esp-rainmaker/components/u8g2/csrc/u8x8_cad.c:309
0x400d612a: u8x8_d_helper_display_init at /Users/colinives/esp/esp-idf/esp-rainmaker/components/u8g2/csrc/u8x8_display.c:68
0x400d6b01: u8x8_d_ssd1306_128x64_noname at /Users/colinives/esp/esp-idf/esp-rainmaker/components/u8g2/csrc/u8x8_d_ssd1306_128x64_noname.c:321
0x400e99dd: u8x8_InitDisplay at /Users/colinives/esp/esp-idf/esp-rainmaker/components/u8g2/csrc/u8x8_display.c:100
0x400d5d68: appDisplay at /Users/colinives/esp/u8g2-esp_idf-example/build/../main/main.c:78
0x400d5daf: app_main at /Users/colinives/esp/u8g2-esp_idf-example/build/../main/main.c:51
0x400ea560: main_task at /Users/colinives/esp/esp-idf/components/freertos/port/port_common.c:133 (discriminator 2)
0x4008907d: vPortTaskWrapper at /Users/colinives/esp/esp-idf/components/freertos/port/xtensa/port.c:168
ELF file SHA256: 1194fa2d6c78e63f
Entering gdb stub now.
$T0b#e6GNU gdb (crosstool-NG esp-2020r3) 8.1.0.20180627-git
Copyright (C) 2018 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
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There is NO WARRANTY, to the extent permitted by law. Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=x86_64-host_apple-darwin12 --target=xtensa-esp32-elf".
Type "show configuration" for configuration details.
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Reading symbols from /Users/colinives/esp/u8g2-esp_idf-example/build/switch.elf...done.
Remote debugging using /dev/cu.usbserial-11330
0x40085976 in panic_abort (details=0x3ffb23fb "abort() was called at PC 0x400dae73 on core 0")
at /Users/colinives/esp/esp-idf/components/esp_system/panic.c:367
367 *((int *) 0) = 0; // NOLINT(clang-analyzer-core.NullDereference) should be an invalid operation on targets
(gdb)I've seen a few examples of the init implementation:
Code: Select all
u8g2_t u8g2;
u8g2_Setup_ssd1306_128x64_noname_f(
&u8g2,
U8G2_R0,
u8g2_esp32_spi_byte_cb,
u8g2_esp32_gpio_and_delay_cb);
u8g2_InitDisplay(&u8g2);Any pointers gratefully received.
Thank you