[Answered] SPI Read Register Delay

[WiFive]

I see the dummy bits, and I believe I see where to set the clock disable in spi_dev_t struct definition. But I don't see an easy way to set this without a modified spi_master.c.

Yes, looks like the driver doesn't support the usr_dummy_idle option yet.

[qjones]

Then you can activate CS (set low any pin used as CS) before first transaction, execute transaction, wait some time, execute the 2nd transaction and deactivate CS.

This is exactly what I ended up doing to get it working late last night. I did not realize at first I could separate the CS into a software/hardware. Everything is working smoothly with the chip now.

ESP_Sprite:

One thing that I have noticed that may or not be a bug but thought I would mention it. The chip is also using the SPI mode 3. So the clock polarity is reversed. However from my logic analyzer it looks like the SPI clk is still in an IDLE low state until you make atleast your first SPI transaction then it stays in IDLE high and everything works great after that. But if I try to do my first read without doing this I get garbage first. For now I am just doing a dummy transaction on the bus first then proceed as normal.

EDIT: Also if passing in -1 for spics io pin number it fails on adding the device to the bus here:

SPI_CHECK(dev_config->spics_io_num < 0 || GPIO_IS_VALID_OUTPUT_GPIO(dev_config->spics_io_num), "spics pin invalid", ESP_ERR_INVALID_ARG);

So there does not seem to be a way to have the hardware spi driver ignore the CS. I still have it working but I have to burn an unused GPIO pin for the hardware spi then use another GPIO for my software toggle.

Thanks for all the help. I'll mark this as answered.

[loboris]

It's hardly possible that

Code: Select all

dev_config->spics_io_num < 0 || GPIO_IS_VALID_OUTPUT_GPIO(dev_config->spics_io_num)

returns false if dev_config->spics_io_num = -1
I'm using it that way and newer had an error.

[qjones]

That's a good point. I am definitely getting a spics pin invalid error from that line though. I only looked briefly earlier and saw the logic as reversed. My mistake. I will have to do more debugging to see what is happening.

Thanks for your help.