ESP32 Forum

The hardware design guide says the following but it's still very unclear:
What does "slightly" mean? What happens if those caps and resistor are removed?

Thanks,

Konstantin

Can anyone from espressif clarify this please?

Bump. Anyone?

Hi kostyan5,

Thank you for raising issue with this description and persistence to get it clarified. The "ESP32 Hardware Design Guidelines" will be updated.

C5 (10 nF) that connects to CAP1 is required to suppress the noise of internal voltage reference and cannot be be removed. RC circuit between CAP1 and CAP2 pins may be omitted under certain conditions. This circuit is used when entering Deep-sleep mode. During this process, to minimize power consumption, the voltage to power ESP32 internals is dropped from 1.1 V to around 0.7 V. The RC circuit is used to minimize the period of the voltage drop. If removed, this process will take longer and the power consumption in Deep-sleep will be higher. If particular application of ESP32 is not using Deep-sleep mode, or power consumption is less critical, then this circuit is not required.

Thanks for clarifying. Do you have any numbers regarding the difference in Deep Sleep current draw with vs without CAP1 and CAP2?

Current data sheet says Power Sleep (RTC timer + RTC memory) is 10uA. What sort of increase are we talking about if CAP1 and CAP2 are removed? Some rought estimate would be fine... 10%, 50%, 100%?

Thanks,

Well 1.1v is a 57% increase vs 0.7v but this is only until the voltage drops under the internal load. So this will have the greatest effect on the low current and short duration deepsleep cycles.