I2S to internal DAC with APLL make noises.
Posted: Thu Mar 23, 2023 9:52 am
Hi.
I try to generate sine via I2S and internal DAC but i have some isues with it.
If i use APLL clock for I2S it make me possible to gen my signals but i got glitches.Hi.
I try to generate sine via I2S and internal DAC but i have some isues with it.
If i use APLL clock for I2S it make me possible to gen my signals but i got glitches.
pll_2d_clc is useles, i cannot configure I2S rate to get my sine freq.
My sine is 1kHz and 2kHz and sample rate 16kHz
First i tryed IDF v4, now v5.0.1.
Board is ESP32-wroom-32d
Is it hardware issue?
I try to generate sine via I2S and internal DAC but i have some isues with it.
If i use APLL clock for I2S it make me possible to gen my signals but i got glitches.Hi.
I try to generate sine via I2S and internal DAC but i have some isues with it.
If i use APLL clock for I2S it make me possible to gen my signals but i got glitches.
pll_2d_clc is useles, i cannot configure I2S rate to get my sine freq.
My sine is 1kHz and 2kHz and sample rate 16kHz
First i tryed IDF v4, now v5.0.1.
Board is ESP32-wroom-32d
Is it hardware issue?
- #include <stdio.h>
- #include <stdlib.h>
- #include <string.h>
- #include <math.h>
- #include <assert.h>
- #include <freertos/FreeRTOS.h>
- #include "freertos/task.h"
- #include "freertos/queue.h"
- #include "driver/gpio.h"
- #include "driver/i2s_std.h"
- #include "driver/adc.h"
- #include "driver/dac.h"
- #include "driver/timer.h"
- #include "esp_log.h"
- #include "proj_dac.h"
- #include "ring_buffer.h"
- #include <hal/dac_ll.h>
- #include <hal/adc_ll.h>
- #include <hal/i2s_ll.h>
- #include "esp_intr_alloc.h"
- static const char *TAG = "wave_gen";
- static QueueHandle_t i2s_queue;
- static const int i2s_num = 0; // i2s port number
- #define SND_RATE 16000
- #define DAC_SND_RATE 1000
- static uint8_t buff[2048];
- static uint8_t btest[] = {
- 0, 95,0,95, 0, 93,0,86, 0, 86,0,63, 0, 75,0,41, 0, 63,0,31,
- 0, 51,0,41, 0, 41,0,63, 0, 34,0,86, 0, 31,0,95, 0, 34,0,86,
- 0, 41,0,63, 0, 51,0,41, 0, 63,0,31, 0, 75,0,41, 0, 86,0,63,
- 0, 93,0,86
- };// 2 sine (1k & 2k)
- void
- dac_init(void)
- {
- static bool inited = false;
- static i2s_chan_handle_t i2s_rx_h;
- static i2s_chan_handle_t i2s_tx_h;
- static i2s_chan_config_t i2s_chan_conf = {
- .auto_clear = false,
- .id = i2s_num,
- .role = I2S_ROLE_MASTER,
- .dma_desc_num = 2,
- .dma_frame_num = 16
- };
- static i2s_std_config_t i2s_conf = {
- .clk_cfg = {
- .sample_rate_hz = DAC_SND_RATE,
- .clk_src = I2S_CLK_SRC_APLL,
- // .clk_src = I2S_CLK_SRC_DEFAULT,
- .mclk_multiple = I2S_MCLK_MULTIPLE_512
- },
- .slot_cfg = {
- .data_bit_width = I2S_SLOT_BIT_WIDTH_16BIT,
- .slot_bit_width = I2S_SLOT_BIT_WIDTH_16BIT,
- .slot_mode = I2S_SLOT_MODE_STEREO,
- .slot_mask = I2S_STD_SLOT_BOTH,
- .bit_shift = false,
- .ws_pol = true,
- .ws_width = I2S_SLOT_BIT_WIDTH_16BIT,
- .msb_right = false
- },
- .gpio_cfg = {
- .bclk = I2S_GPIO_UNUSED,
- .din = I2S_GPIO_UNUSED,
- .dout = I2S_GPIO_UNUSED,
- .mclk = I2S_GPIO_UNUSED,
- .ws = I2S_GPIO_UNUSED,
- .invert_flags = {
- .bclk_inv = false,
- .mclk_inv = false,
- .ws_inv = true
- }
- }
- };
- if(!inited) {
- ESP_ERROR_CHECK(i2s_new_channel(&i2s_chan_conf, &i2s_tx_h, &i2s_rx_h));
- ESP_ERROR_CHECK(i2s_channel_init_std_mode(i2s_rx_h, &i2s_conf));
- ESP_ERROR_CHECK(i2s_channel_init_std_mode(i2s_tx_h, &i2s_conf));
- ESP_LOGI(TAG,"N:%d, B:%d, A:%d, M(rx):%d, M(tx):%d",
- I2S0.clkm_conf.clkm_div_num,
- I2S0.clkm_conf.clkm_div_b,
- I2S0.clkm_conf.clkm_div_a,
- I2S0.sample_rate_conf.rx_bck_div_num,
- I2S0.sample_rate_conf.tx_bck_div_num
- );
- I2S0.conf2.lcd_en = 1; //TRM page 318 12.5.3 ADC/DAC mode
- I2S0.conf.rx_short_sync = 0;
- I2S0.conf.tx_short_sync = 0;
- I2S0.conf.rx_msb_shift = 0;
- I2S0.conf.tx_msb_shift = 0;
- ESP_ERROR_CHECK(dac_output_enable(DAC_CHANNEL_1));
- ESP_ERROR_CHECK(dac_output_enable(DAC_CHANNEL_2));
- ESP_ERROR_CHECK(i2s_channel_enable(i2s_rx_h));
- ESP_ERROR_CHECK(i2s_channel_enable(i2s_tx_h));
- size_t b_writen = 0;
- vTaskDelay(1000 / portTICK_RATE_MS);
- i2s_channel_write(i2s_tx_h, btest, sizeof(btest) / sizeof(btest[0]), &b_writen, portMAX_DELAY);
- i2s_channel_write(i2s_tx_h, btest, sizeof(btest) / sizeof(btest[0]), &b_writen, portMAX_DELAY);
- i2s_channel_write(i2s_tx_h, btest, sizeof(btest) / sizeof(btest[0]), &b_writen, portMAX_DELAY);
- // 1 sample for data buff uint8 [z,R,z,L]
- ESP_ERROR_CHECK(dac_i2s_enable());
- inited = true;
- } else{
- ESP_ERROR_CHECK(i2s_channel_disable(i2s_rx_h));
- ESP_ERROR_CHECK(i2s_channel_disable(i2s_tx_h));
- ESP_ERROR_CHECK(i2s_channel_reconfig_std_clock(i2s_rx_h, &i2s_conf.clk_cfg));
- ESP_ERROR_CHECK(i2s_channel_reconfig_std_clock(i2s_tx_h, &i2s_conf.clk_cfg));
- ESP_ERROR_CHECK(i2s_channel_enable(i2s_rx_h));
- ESP_ERROR_CHECK(i2s_channel_enable(i2s_tx_h));
- }
- }
- void
- dac_single_init(void )
- {
- dac_init();
- esp_log_level_set("I2S",ESP_LOG_ERROR);
- }