Hi,
I have been tracing a call to rtc_gpio_pullup_dis(GPIO_NUM_2). This leads to a call to rtcio_ll_pullup_disable where bit 27 is cleared of RTCIO_TOUCH_PAD2_REG. I checked the TRM for this register (Register 4.54) but for bit 27 it says "reserved". What am I missing here?
TIA,
AP
Search found 53 matches
- Thu Jun 10, 2021 1:57 pm
- Forum: ESP-IDF
- Topic: Bit 27 of RTCIO_TOUCH_PADn_REG
- Replies: 2
- Views: 3203
- Sun Jun 06, 2021 4:15 am
- Forum: General Discussion
- Topic: Use ULP to blink LED
- Replies: 3
- Views: 6347
Re: Use ULP to blink LED
Thanks, that helped. I got it to work with:
AP
Code: Select all
WRITE_RTC_REG(RTC_IO_PAD_DAC1_REG, 17, 1, 1)
WRITE_RTC_REG(RTC_IO_PAD_DAC1_REG, 15, 2, 0)
- Sat Jun 05, 2021 6:03 am
- Forum: General Discussion
- Topic: Use ULP to blink LED
- Replies: 3
- Views: 6347
Use ULP to blink LED
Hi, I have been looking at this example where the author used the ULP to make an LED blink: https://github.com/joba-1/Blink-ULP The example uses GPIO 2 (RTC GPIO 12) to connect the LED. I tried unsuccessfully to change the example to make use of GPIO 25. According to table 4.4 of the TRM GPIO 25 is ...
- Mon May 24, 2021 3:53 am
- Forum: ESP-IDF
- Topic: ULP equivalent for rtc_gpio_init() ? [solved]
- Replies: 2
- Views: 4948
Re: ULP equivalent for rtc_gpio_init() ? [solved]
Thanks for your example! I'm trying to do the opposite: do the initialization on the main CPU and then let the ULP do the blinking. I commented out the two WRITE_RTC_REG to initialize GPIO_NUM_2 and then tried: rtc_gpio_init(GPIO_NUM_2); rtc_gpio_set_direction(GPIO_NUM_2, RTC_GPIO_MODE_OUTPUT_ONLY);...
- Wed Feb 03, 2021 7:53 pm
- Forum: ESP-IDF
- Topic: Statically linking components with ESP-IDF v4
- Replies: 2
- Views: 3777
Re: Statically linking components with ESP-IDF v4
thanks, Angus. Works as advertised!
AP
AP
- Wed Feb 03, 2021 4:01 am
- Forum: ESP-IDF
- Topic: Statically linking components with ESP-IDF v4
- Replies: 2
- Views: 3777
Statically linking components with ESP-IDF v4
Hi, in one of my projects I have various ESP-style components that contribute functionality that is *not* accessed by the "main" component via function calls. E.g., there is no API-dependence from "main" to the component. That means that the clever ESP-IDF built system will just simply not link the ...
- Thu Jan 14, 2021 6:48 pm
- Forum: ESP-IDF
- Topic: Memory mapped GPIO access and memw
- Replies: 1
- Views: 2862
Memory mapped GPIO access and memw
Hi, I looked at the generated assembly for a simple memory mapped GPIO access: GPIO.out_w1ts = SOME_VAL; Here is the assembly I see: l32r a9, SOME_VAL l32r a8, GPIO memw s32i.n a9, a8, 8 I wanted to ask about the memw instruction. First of all, why is the memw instruction before the s32i instruction...
- Fri Aug 14, 2020 4:56 pm
- Forum: General Discussion
- Topic: Running a MCP23017 on 5V
- Replies: 14
- Views: 21795
- Fri Aug 14, 2020 12:10 am
- Forum: General Discussion
- Topic: Running a MCP23017 on 5V
- Replies: 14
- Views: 21795
Re: Running a MCP23017 on 5V
here you go. Again, I am using the SPI variant; not I2C: // Configure SPI bus spi_bus.flags = SPICOMMON_BUSFLAG_MASTER; spi_bus.sclk_io_num = SPI_PIN_NUM_CLK; spi_bus.mosi_io_num = SPI_PIN_NUM_MOSI; spi_bus.miso_io_num = SPI_PIN_NUM_MISO; spi_bus.quadwp_io_num = -1; spi_bus.quadhd_io_num = -1; spi_b...
- Wed Aug 12, 2020 2:44 pm
- Forum: General Discussion
- Topic: Running a MCP23017 on 5V
- Replies: 14
- Views: 21795
Re: Running a MCP23017 on 5V
Here is a quote from MCP23017 specs : The INTn interrupt output can be configured as active- low, active-high or open-drain via the IOCON register. However, do note that by default it's not an open-drain configuration, so in theory you can have a startup scenario where the chip will output 5V on th...