Search found 2 matches

by sauttefk
Thu Oct 12, 2017 11:48 am
Forum: Report Bugs
Topic: APLL / GPIO16_EMAC_CLK_OUT - wrong frequency - unable to generate 50MHz clk with rev0 chip
Replies: 1
Views: 5056

APLL / GPIO16_EMAC_CLK_OUT - wrong frequency - unable to generate 50MHz clk with rev0 chip

I want to use the APLL to generate the required 50MHz for an external Ethernet PHY using the APLL and the EMAC_CLK_OUT on GPIO16. Somehow the output frequency is unexpectedly divided by 5 According to the ECO and Workarounds for Bugs in ESP32 (issue 3.7) document the formula for the APLL frequency f...
by sauttefk
Thu Oct 12, 2017 10:52 am
Forum: General Discussion
Topic: APLL / GPIO16_EMAC_CLK_OUT - wrong frequency - unable to generate 50MHz clk with rev0 chip
Replies: 2
Views: 7499

APLL / GPIO16_EMAC_CLK_OUT - wrong frequency - unable to generate 50MHz clk with rev0 chip

I want to use the APLL to generate the required 50MHz for an external Ethernet PHY using the APLL and the EMAC_CLK_OUT on GPIO16. Somehow the output frequency is unexpectedly divided by 5 According to the ECO and Workarounds for Bugs in ESP32 (issue 3.7) document the formula for the APLL frequency f...