Ok, thanks. Converting M_SYNC to CS signal seems to be a good idea. This probably need a counter to 188 clocks. But there is also another trouble: A Hi-speed stream capture process should run without CPU intervention. Restarting DMA transfer, (considering 2us Interrupt latency) will case a packets l...

Thank you ESP_Sprite. 160 Mb/sec is a highest bit rate supported by demodulator according to Montage M88DS3103 Data Sheet. In real life bit rates used by broadcast operators are much lower. DVB-S2 (Satellite transmission) bit rate depend on particular transponder and can variate from 10 to 65 Mb/sec...

Sorry guys. I think I should be more specific in my previous post. Here are some additional points. 1. The main project goal is to capture Stream Information Tables, extract useful info and send it over WiFi to the final user. It could be Program Guide (EPG), NIT info etc. Optionally, if CPU power w...

Hi, I am planning to add a Digital TV tuners (DVB) support to the ESP32. This job may be split in two parts: 1) Tuner-demodulator control using a I2C - It is a trivial task. 2) Transport Stream (TS) capture and demultiplexing. This is the hardest part. For better understanding, let me put here some ...

Hi! This solution, and all the others I have managed to find on the NET did not work for me. After several days of investigation, I have find the way to make the debugger working. The solution was simple - Reduce the JTAG clock in the esp-wroom-32.cfg file. In my case 5MHz was fine: "adapter_khz 500...

Hi there, I have made some tests on my ESP32-DevKitC board. (VCC 3.3V) The setting I used was: ADC1 channel 0; ADC_WIDTH_12Bit, ADC_ATTEN_11db. Non stop reading of 1024 samples in a loop takes 22 ms. So, the max sampling frequency is 46kHz. But, in my project I need, at least, 100kHz. Does anyone ha...