Search found 21 matches

by powerbroker
Tue Jun 18, 2024 2:43 am
Forum: Hardware
Topic: Wireless communication between sea-water submerged wearable and esp32 above surface
Replies: 2
Views: 404

Re: Wireless communication between sea-water submerged wearable and esp32 above surface

i took part in developing RF I/O from inside of sea cargo container(box of steel) to outside part on surface: inner temperature, banana-gas quality, etc. we had to add an amplifier chip to CC1101 on 433MHz to keep stable link - the steel box is dropping amplitude about 60 000..80 000 times. in case ...
by powerbroker
Tue Jun 18, 2024 2:10 am
Forum: Hardware
Topic: SPI_USER_REG byte order flags: what do they exactly do?
Replies: 2
Views: 342

Re: SPI_USER_REG byte order flags: what do they exactly do?

hi https://github.com/espressif/esp-idf/blob/master/components/esp_driver_spi/include/driver/spi_master.h #define SPI_DEVICE_TXBIT_LSBFIRST (1<<0) ///< Transmit command/address/data LSB first instead of the default MSB first #define SPI_DEVICE_RXBIT_LSBFIRST (1<<1) ///< Receive data LSB first inste...
by powerbroker
Tue Jun 18, 2024 1:44 am
Forum: Hardware
Topic: Power supply from both USB-C and +3V3 or 5V
Replies: 2
Views: 464

Re: Power supply from both USB-C and +3V3 or 5V

So, how to (conditionally) isolate the power supplies from both sides? Anyone experience, thoughts? Just plug and pray? my friend simply uses solution you don't consider as an option - 5V-cut USB cable. i usually route a jumper, disconnecting one of power sources - and very often install it and for...
by powerbroker
Mon Jun 17, 2024 4:07 am
Forum: Hardware
Topic: SPI_USER_REG byte order flags: what do they exactly do?
Replies: 2
Views: 342

SPI_USER_REG byte order flags: what do they exactly do?

There are SPI_USER_REG (0x1C) flags SPI_WR_BYTE_ORDER and SPI_RD_BYTE_ORDER , switching endianess of Tx and Rx data. When SPI MISO stream is following: 00 49 4A F0 80 00.png from left to right: 00 49 4A F0 80 00, with default settings SPI transaction field rx_buffer gets MISO data exactly in the ord...
by powerbroker
Sun Jun 16, 2024 9:26 pm
Forum: Hardware
Topic: SPI Rx chunk size in DMA mode
Replies: 12
Views: 1148

Re: SPI Rx chunk size in DMA mode

Nope. The code of spi_ll_read_buffer() you quoted does handle all bitlens correctly. Take bitlen = 40 (5 bytes) for example, and mentally execute the code: It will do two iterations (with x=0 and x=32, respectively), copying 4 bytes in the first and 1 byte in the second iteration. Saying that "this...
by powerbroker
Sat Jun 15, 2024 3:58 pm
Forum: Hardware
Topic: SPI Rx chunk size in DMA mode
Replies: 12
Views: 1148

Re: SPI Rx chunk size in DMA mode

Are you replying to what ESP_Sprite says? I think he was quite clear. Anyway, I don't think it makes sense to start up DMA for just two (or four) bytes. The overhead will be huge and most of the handling will be done by the SPI module anyway. I remember having seen a table in the documentation with...
by powerbroker
Sat Jun 15, 2024 3:24 pm
Forum: Hardware
Topic: SPI Rx chunk size in DMA mode
Replies: 12
Views: 1148

Re: SPI Rx chunk size in DMA mode

I am 100% positively not sure what you're actually saying while throwing several unrelated things in. (What do the unions declared inside struct spi_transaction_t have to do with anything?) Are you saying that the SPI driver writes more data to the user-provided RX memory than what documentation sa...
by powerbroker
Sat Jun 15, 2024 2:32 am
Forum: IDEs for ESP-IDF
Topic: Great news about C/C++ indexing in the lilght of last Eclipse update
Replies: 0
Views: 320

Great news about C/C++ indexing in the lilght of last Eclipse update

in couple of words: completely broken. that means no more “let’s postpone”, “there are more important things to do”, “at least somehow it works”, etc. it's not it doesn't work somehow - it does not work at all. so, the time to get C/C++ indexing in ESP-IDF Eclipse plugin in order has finally come. s...
by powerbroker
Mon Jun 10, 2024 5:18 am
Forum: Hardware
Topic: SPI Rx chunk size in DMA mode
Replies: 12
Views: 1148

Re: SPI Rx chunk size in DMA mode

Malloc always allocates on a 32-bit boundary and you get a size back that is rounded up to the next 32-bit-aligned byte. I'd generally advice against using the same buffer for Tx and Rx. In practice, DMA has a bunch of FIFOs and buffering, so I think it'd only start out writing data after it alread...
by powerbroker
Sun Jun 09, 2024 4:23 pm
Forum: Hardware
Topic: SPI Rx chunk size in DMA mode
Replies: 12
Views: 1148

Re: SPI Rx chunk size in DMA mode

Hi it makes no sense to use dma mode when the data length is less than 32 bits you will incur unnecessary overhead on dma initialization plus dma reads/writes memory always says 32 bits spi always works through its internal buffer set the flags SPI_TRANS_USE_TXDATA , SPI_TRANS_USE_RXDATA and the dr...