Hi, I want to learn more on how compiled code is structured on binary level. Therefore, I wrote a simple program that calculates the factorial of a given number and prints it to the monitoring device. I modified the hello world project shipped with ESP-IDF to implement this. Afterwards, I decompiled...

That description is terse, but accurate. What information specifically are you missing? (And note that aside from having segments, the format has very little to do with ELF and is not derived from it, it's a custom format.) For example, segment placement. There's a talk about "Extracting an ELF Fro...

Hi, I'm trying to analyse some ESP32 binaries, and could not find any documentation about the image format besides the explanation of the header fields in the ESP-IDF Programming Guide [1], not even the name of the format (it's a modified version of .elf). Or formats, as reading Esptool's code [2] s...

Hi, I'm using xtensa-esp32-elf-objdump[1] to analysis some ESP32-Binaries. I noticed that sometimes 0x3f single byte instructions(?) can be found in the disassembly. For example: 3f.png I could not find any mentioning of this in the Xtensa-ISA[2]. Why are they placed there? Regards [1] https://githu...

Hi, Chapter 3.5.4.1 Little-Endian Fetch Semantics of the Xtensa Instruction Set Architecture (ISA) Summary [1] provides some example code on its behaviour. One of the comments states: "-- now have a 24-bit instruction (8 bits undefined if 16-bit), break it into fields" If I replace the op-code of a ...

Hi, thanks for the quick answer. GCC offers two flags to specify the endianness of the binary to build [1]: -mbig-endian and -mlittle-endian. Searching within the ESP-IDF with > grep -rnw ./esp-idf -e "-mbig-endian" (resp. "-mlittle-endian") did not provide any results. When compiling the Hello Worl...

Hi, Chapter 3.2 Processor-Configuration Parameters of the Xtensa Instruction Set Architecture (ISA) Summary [1] reads as follows: "Core Processor-Configuration Parameters lists the processor-configuration parameters that are required in the core architecture. Additional processor-configuration param...