Hello again, one more question: Is there an guaranteed max interrupt latency time for LOWMED interrupt type? Lets say there is interrupt registered like this: gpio_set_intr_type(intr_pin, GPIO_INTR_NEGEDGE); gpio_install_isr_service(ESP_INTR_FLAG_LOWMED); gpio_isr_handler_add(intr_pin, handler, (voi...

Hello, could you recommend me a mutex/semaphore use to wait for all tasks to stop? Each task of interest has onStart, onResume and onStop handlers and main loop which waits for a Notification. If it receives a notification to stop, it calls its onStop handler. There are particular situations where I...

Hello, from the ESP32 Technical Reference Manual I can see I2C peripheral provides Data shifter module: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf#i2c Page 285 / Figure 111. I2C Master Architecture Page 297 / Register 11.2. I2C_CTR_REG (0x0004...

Wow I expected like only one or two more instructions for unaligned struct access, not 10 :D However, in terms of speed, does one Assembler instruction take always at least one CPU clock tick? Can't it process some instructions at once? So the Assembler code may look slow, but actually it could be d...

First of all, pass the handle by reference: esp_ota_handle_t update_handle = NULL; esp_err_t retv = esp_ota_begin(target, OTA_SIZE_UNKNOWN, &update_handle); Notice the ampersand (&) in argument passing, and handle declaration as normal variable, not a pointer. Second thing, check if result from esp_...

I've heard about structure padding to reduce R/W operations to access a struct member, and that there is "packed" option to disable this padding optimization. I would like to write struct in certain order, to keep mutual parameters together. But to apply reorder optimization at compilation to reduce...

So... there is probably no guaranteed method to prevent these delays. After some googling I've found a few posts, they call them "wear-leveling delays", and they are SD card inherent - each SD card can handle it differently. So the only solution seems to be a buffer big enough to outlast accidental ...

Hello, I've noticed random/unpredictable longer write time onto SD card and would like to know why it happens. Normally, to write 4096 byte block usually takes 4-5 ms, so the speed is 0.70 MB/s in average. However, sometimes it takes up to 50 ms. At first I thought it is because FAT library is alloc...

I see you are facing very similar problem as I do with frequent SPI reads triggered by interrupt. In my case, I found out that 4 ms delay was caused by xTaskList() or uxTaskGetSystemState() that calls vTaskSuspendAll() in its implementation. Check if you don't call one of these functions every 5 sec...

Yeah, I don't need DMA if I have to trigger each transaction from CPU. DMA would be useful if SPI peripheral could automatically trigger prepared transaction whenever MISO goes low, read 32-bit word, store to DMA, wait for another MISO -> low level. Actually, I am basically doing what you suggest - ...