Search found 9 matches
- Wed Sep 07, 2022 2:02 pm
- Forum: ESP-IDF
- Topic: ESP32-S3 PSRAM issue
- Replies: 2
- Views: 2430
ESP32-S3 PSRAM issue
Hello, we planned to put a ~110KB buffer into SPIRAM (SPIRAM chip size is 2MiB). Since it is the only thing we need in this memory area, we tried to use the simple method of integrating the SPI ram into the memory map, and access it with pointers. Note that the integrated SPI ram test is enabled and...
- Fri Sep 02, 2022 10:17 am
- Forum: ESP-IDF
- Topic: ESP32-S3 ADC reading issue
- Replies: 4
- Views: 3780
Re: ESP32-S3 ADC reading issue
Added schematic snapshots of the reset and ADC circuit.
- Fri Sep 02, 2022 9:55 am
- Forum: ESP-IDF
- Topic: ESP32-S3 ADC reading issue
- Replies: 4
- Views: 3780
Re: ESP32-S3 ADC reading issue
Did you try any of the default examples here? https://github.com/espressif/esp-idf/tr ... herals/adc Yes. First of all, it does not compile for S3, so I had to remove some parts that check the calibration type (function "check_efuse"). I also had to add a few lines that configure a different GPIO, ...
- Thu Sep 01, 2022 4:18 pm
- Forum: ESP-IDF
- Topic: ESP32-S3 ADC reading issue
- Replies: 4
- Views: 3780
ESP32-S3 ADC reading issue
We are having issue getting the correct reading from our custom board with ESP32-S3-WROOM-1 module. In our design, we have connected ADC1_CHANNEL_6 (GPIO_NUM_7) in between two resistors, forming a voltage divider. The expected voltage range there is 1V5 to 2V7, which is of our battery power input. D...
- Fri Jun 03, 2022 2:08 pm
- Forum: ESP-IDF
- Topic: ESP-S3 deep sleep not functional
- Replies: 4
- Views: 3179
Re: ESP-S3 deep sleep not functional
Hi,
the issue is resolved by updating to latest IDF.
the issue is resolved by updating to latest IDF.
- Mon May 23, 2022 8:06 am
- Forum: ESP-IDF
- Topic: ESP-S3 deep sleep not functional
- Replies: 4
- Views: 3179
Re: ESP-S3 deep sleep not functional
Debug output with loglevel=verbose: --- idf_monitor on /dev/ttyACM0 115200 --- --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H --- I (24) boot: ESP-IDF v4.4-dev-3235-g3e370c4296 2nd stage Fi data ESP-ROM:esp32s3-20210327 Build:Mar 27 2021 rst:0x15 (USB_UART_CHIP_RESET),boot:0x8 (SP...
- Mon May 23, 2022 6:49 am
- Forum: ESP-IDF
- Topic: ESP-S3 deep sleep not functional
- Replies: 4
- Views: 3179
Re: ESP-S3 deep sleep not functional
This is still an issue. To reproduce, all you need to do is copy the deep-sleep example, run "idf.py set-target esp32-s3" and "idf.py menuconfig" to configure/disable touch and GPIO wakeup depending on your board, and "idf.py flash monitor" it. Below is output from unmodified deep sleep example, usi...
- Fri May 13, 2022 11:55 am
- Forum: ESP-IDF
- Topic: ESP-S3 deep sleep not functional
- Replies: 4
- Views: 3179
ESP-S3 deep sleep not functional
Hi, I am using this code on ESP32-S3-DevKitC-1 https://pastebin.com/4WyxerTX Note Line 54 esp_sleep_config_gpio_isolate() removing this does not make a difference. I cannot get deep sleep to work. The device never enters deep sleep. Instead the WDT kicks after 5 seconds. If WDT for IDLE is disabled,...
- Thu Feb 03, 2022 7:48 am
- Forum: Hardware
- Topic: JTAG pins 12, 13, 14, & 15
- Replies: 4
- Views: 5587
Re: JTAG pins 12, 13, 14, & 15
Please advise on how to do so, for ESP32.You can use them as normal GPIOs (or peripheral pins routed over the GPIO matrix) by configuring them as such in ESP-IDF.
Simply configuring them as output, disabling pull-resistors, and then setting a level does not work.
Thanks