Thank you for your quick reply, it is very interesting to know what the theoretical max speed is. As you said I am still far from that. I guess that someone from Espressif did some speed tests for validation purposes, could you or this person share the code and kconfig so that people can start from ...

Hello everyone, I have just run some USB speed tests, for my system I need a TX speed of about 10 Mbits/s. I managed to get a speed of 4.25 Mbits/s. To reach this speed I set the CPU frequency to 240 MHz and the CDC FIFO size of TX channel to 20000 in menuconfig. I am sending 20000 bytes chunks of d...

Hello everyone, Everything is into the subject. I have searched the internet for that and apparently it seems to be possible but no real solution was explained. I need to do this because I have time critical actions that can't be started by interrupts (too much latency) and that can't be handled by ...

Hello ESP_Sprite, What you said is interesting and exactly what I need, I have the same issue. How can you do that? I have tried vTaskSuspendAll() on core 1 but there is still a few miroseconds interruption each millisecond. I searched the internet but I can't find how to do disable the ticks and th...

Hello space2021, I have the same need as yours, I would like to create 2 RMT signals that start at the exact same time (or with a small and repetitive jitter). Did you found a way to solve this? Thank you.

Hello everyone, I am trying to generate 2 synchronized signals using the RMT peripheral (timings are critical). I managed to generate the signals properly and they are synchronized and looping forever, however I fail to have a known and repeatable phase shift between the signals. After the driver in...

Ok, thank you for your help. For I have found up to now, RMT seems to be a possibility, but I have difficulties to synchronize the signals. I will start a new thread for these questions.

In fact, at 500ksps the clock line needs to be stopped each 2us, it means that when the interrupt will start we will already be one cycle late. If we could keep the clock line active then yes I agree, its not a problem to loose a few samples, but the issue here is that this clock line must be interr...

Thank you for your reply! According the component datasheet, the clock signal must be interrupted when the ADC is busy in order to avoid clock pertubations when sampling. The clock signal is given by the ESP I2S peripheral not by the ADC. So it would mean interrupting this clock signal... In additio...

Hello everyone, I am trying to read an ADC at a high sampling rate (500ksps). The two available SPI ports of the ESP32 are already used for another purpose requiring full bandwidth. First I tried to do it by bitbanging. It works but only at slow sampling rates (<75ksps) mainly because toogling the I...