Could you please elaborate more the real world scenario which causes your concern? Do you have some "stability" issues with the W5500? The reason why I am asking is your questions seems to me bit non-standard to be honest. We usually don't perform any periodical checking of a submodule after it was ...

Unfortunately, LAN8720 does not stop CLK when in reset. Please see discussion at https://github.com/espressif/arduino-esp32/pull/6188 for more details.

I see, thanks for additional information. You can also try to play with `input_delay_ns` SPI configuration parameter. It helped me to make SPI work at higher frequencies. Please also make sure you have proper SPI signal routing in your PCB design.

GPIO 16/17 can be configured as output to RMII REFCLK. However, these pins can be also programmed for different usage like PSRAM. Therefore be very careful when you are making a decision which ESP32 module to use. For example, if you wanted to use ESP32 module with Ethernet and you needed to use ESP...

Do you use some Espressif's example for testing (e.g. iperf)? What is your SPI Clock frequency settings? What is a traffic you are trying to receive? I unfortunately don't have any comprehensive iperf performance figures available right now. However, what I found in some old DM9051 related MRs, is t...

Ok, just make sure you handle the LAN8720 clock properly too. Just a note regarding the switch on the DP83848 dev board, that's not likely to happen... It seems it fits its original use case, it would be more expensive and having a switch on CLK lane could possibly also cause problems with signal in...

Hi @ahmetbasli001, I am not sure if I fully understand to your problem. usually (90%) ESP and LAN9303I chip do not get connected and the RMII connection cannot be established Does it mean that the ESP starts properly and the LAN9303I is properly initialized via SMI? And the only thing which does not...

I already mentioned it... GPIO0 is also used as bootstrap pin. Therefore, when you connect something to it and you don't ensure proper logic level at this input during power up, the ESP32 may enter DOWNLOAD mode. And that's exactly what happened to you when you connect OSCIN to GPIO0, you have 50:50...

I checked the schematics related to your dp83848 dev board. The board has 50 MHz oscillator so you need to connect "OSCIN" pin of P2 header to ESP32 GPIO0 and configure as CLKIN in the IDF.

Is it this one? https://www.waveshare.com/dp83848-ethernet-board.htm