I'm having difficulty getting LRCLK and BCLK correct with 24-bit I2S. With 48k sample rate I'm getting the correct MCLK (12.288) however LRCLK is around 51 kHz, BCLK is correctly aligned to LRCLK. At 44.1KHz same issue with LRCLK close to 47kHz. The issue occurs on both an S3 and a traditional ESP32...

I have written a utility to overcome this issue

https://github.com/palmerr23/ESP32-OTA-and-File-Manager

It provides a web-based interface for
* OTA
* File system formatting
* FS directory listing
* File uploading
* File editing
* File deletion

KA101, I solved the problem in a different way. When installing the I2S driver, there's an option to create an event queue, which flags TX_DONE (or RX_DONE). I then created an xTask that sampled the queue, processing an I2S buffer each time the queue indicated one was completed. To make sure I wasn'...

Hi (newbie here), I'm working on a project that inputs audio packets via UDP (VBAN protocol) and outputs them to an external I2S DAC. It's working fine, other than occasional crackles. I suspect that I'm suffering DMA buffer underrun, but don't know a way to detect when the I2S/DMA has run out of fr...