Something amazing for a high end high performance version of a future ESP32 v2 will be mainly To support natively eMCP to have both Mobile DRAM(LPDDR2 or LPDDR3) + eMMC Flash directly on top of the die (to be soldered ...) like that on bottom of the die we will have x GPIO/Peripherals ... so it will...

Hardware & software protections against (mainly during the secure boot computations/checks...): Clock Glitch Attacks Power Glitch Attacks SCA (Side Channel Attacks) FA (Fault Attacks) DFA (Differential Fault Analysis) More details here: https://www.ssi.gouv.fr/uploads/IMG/pdf/DFSCA.pdf Of course tho...

I would recommend HydraESP32v1.1 Rev1.0 (with ESP-WROOM-32) see link here https://hydrabus.com/2016/11/16/hydraesp32-with-esp-32s-v1_1_rev1-is-alive/ It is heavily recommended to solder also the big GND (on center) of the ESP-WROOM-32 for heat dissipation in case you use everything Wifi+BLE+Dual Cor...

HydraESP32 HydraBus v1.0 Shield for ESP-WROOM-32 V1.1 Rev1.0 is alive https://hydrabus.com/wp-content/uploads/2016/11/HydraBus__Shield_ESP_WROOM_32_v1_1_Rev1_ESP-32S_final.jpg This new version allow to measure ESP32 power consumption (and/or manage power ON/OFF of ESP32 with any MCU…) This version c...

Neil, we have an automated test suite which has two parts: Compilation tests, build system tests, and a few unit tests which can run on the PC. Run for every commit, takes ~5 minutes to run. Integration tests which involve real esp32 devices connected to a PC. Run for each commit on master branch, ...

This 1st part is mainly how to connect FTDI C232HM DDHSL-0 to ESP32 DevKitC (also called ESP32-CoreBoard V2) https://hydrabus.com/wp-content/uploads/2016/10/esp32-devkitc_with_FTDI_C232HM_DDHSL-0_JTAG_Debug.jpg For more details on JTAG /GDB /ESP32 OpenOCD see https://github.com/espressif/esp-idf/blo...

This shield can be used with or without HydraBus board, you can even cut HydraBus specific right side (on the line) to have a tiny ESP-WROOM-32 breakout board. https://644db4de3505c40a0444-327723bce298e3ff5813fb42baeefbaa.ssl.cf1.rackcdn.com/55026ca8fe2840843aafa3db5696e0f5.png https://644db4de3505c...

Yes such feature will be great to speed up build time. It will be very interesting to also check other compiler option a bit like on ARM CortexMx with GCC 4.8 or more with LTO option (-flto) which heavily reduce final bin/elf size (elimination of unused functions) and also optimize speed. As for exa...

ESP_igrr wrote:

hydrabus wrote: Could you share your plugin ?
My email is bvernoux at hydrabus.com

I've sent you an email.

Thanks for all I have replied to your Email

1) A way to Count Leading Zeros of a 32bits unsigned integer Does such feature exist on ESP32 CPU ? Yes, using NSAU instruction. Compiler will generate it if you use GCC __builtin_clz() intrinsic. Thanks for the hint and the fact it support asm instruction for that I will test it later to check it ...