Search found 73 matches

by Scott.Bonomi
Mon Mar 01, 2021 7:02 pm
Forum: ESP-IDF
Topic: ESP32 debug issue on custom board using J-Link
Replies: 9
Views: 10510

Re: ESP32 debug issue on custom board using J-Link

With text lost to the right on the invocation line, it is not clear what all you are doing. I think you might want to get a log from openocd to see exactly what is going on. For my work on a custom ESP32-U4WDH, I use: openocd -f interface/jlink.cfg -f board/esp32-solo-1.cfg -d3 -l ./OCDLOG_TurboII.l...
by Scott.Bonomi
Mon Mar 01, 2021 6:37 pm
Forum: ESP-IDF
Topic: Wifi-SoftAP Connection failure on custom board
Replies: 0
Views: 1788

Wifi-SoftAP Connection failure on custom board

I am trying to run the wifi-softAP example on a custom board using the ESP32-U4WDH chip (not a module). Upon first power-on cycle, I did not see the SSID on my phone to connect to it. On second power-on, I discovered and attempted to connect to the Wifi AccessPoint. This attempt failed to connect. R...
by Scott.Bonomi
Mon Feb 22, 2021 8:43 pm
Forum: Hardware
Topic: Super fast ADC with Esp32
Replies: 5
Views: 10941

Re: Super fast ADC with Esp32

Sampling faster has the advantage of allowing you to filter the results and so get a higher number of effective bits from the ADC. But you also need to pay attention to what effect that has on the signal. At what point does switching nose (ADC Shifting from input 1 to input 2) become noticeable? The...
by Scott.Bonomi
Mon Feb 22, 2021 8:00 pm
Forum: Hardware
Topic: ESP32-MINI-1 minimum operating voltage
Replies: 10
Views: 9494

Re: ESP32-MINI-1 minimum operating voltage

It is educational to hear a positive statement that the U4WDH Flash is a second silicon device. I will call it unfortunate that you did not select a part that could work on 1.8V for the SPI interface. All the U4WDH parts I have tell me there is a generic flash part. (614) efuse: Loading virtual efus...
by Scott.Bonomi
Wed Feb 10, 2021 1:35 am
Forum: ESP-IDF
Topic: RS485 with 9 data bits
Replies: 3
Views: 4974

Re: RS485 with 9 data bits

I suggest you look up the definition of UART_DATA_BITS_MAX. Or set a log statement to print it. It appears to be a limit to a table not a functional number of bits.
by Scott.Bonomi
Wed Feb 10, 2021 1:13 am
Forum: ESP-IDF
Topic: JLINK with Eclipse
Replies: 2
Views: 3247

Re: JLINK with Eclipse

You can use a JLink to debug a DevCKit, I use a JLINK Compact Plus. You have to have a recent version of openocd, 10.0 at a minimum I put the DevKitC (Solo flavor) in a prototyping board and then had to make jumpers from the individual pins to the header in the JLINK Plus Compact. I am using 7 wires...
by Scott.Bonomi
Wed Feb 10, 2021 12:51 am
Forum: ESP-IDF
Topic: SPI delay time between transactions.
Replies: 5
Views: 5783

Re: SPI delay time between transactions.

It is not clear why you have such a delay. It appears that you have a conflict in the description of the T transaction. I believe you want to send a byte with T and Receive 3 with R. you are set up to receive on both since your rx length is equal to total length in both. for a TX byte, I would expec...
by Scott.Bonomi
Wed Feb 10, 2021 12:32 am
Forum: General Discussion
Topic: save string read from serial com into eeprom
Replies: 1
Views: 2809

Re: save string read from serial com into eeprom

For my system, I started by including most of the nvs_rw_value example for initialization, and added functions to handle strings of variable sizes.
I believe you can also store MAC address in the E-fuze block if you want to, but if you expect it to be modified often then NVS may be appropriate.
by Scott.Bonomi
Thu Feb 04, 2021 5:17 pm
Forum: ESP-IDF
Topic: [SPI Master] Data on MOSI is not the value we put in "spi_device_transmit()"
Replies: 6
Views: 5799

Re: [SPI Master] Data on MOSI is not the value we put in "spi_device_transmit()"

JonathanChen -

For your anomaly tracing, it is often very worthwhile to use the Chip Select line down transition as a trigger for the scope.

- - Scott
by Scott.Bonomi
Thu Jan 21, 2021 9:17 pm
Forum: ESP-IDF
Topic: v4.2 Build Failure when migrating from v4.0.1
Replies: 0
Views: 1918

v4.2 Build Failure when migrating from v4.0.1

I get a build failure on my project which uses Server, SPI, NVS features when moving from 4.0.1 to v4.2 (HEAD). Specifically there seems to be an issue in including features not needed. What I get is: ========================================================================================= In file i...