RPi PIO peripheral On a personal note: Not gonna lie, I'm drooling all over that thing as well. :-) :-) :-) One thing I'm really missing in that PIO thing is the ability to do a table lookup (i.e. random memory access) to do things like color table lookup when sending a framebuffer to a display... ...

RPi PIO peripheral

Thanks for all the info, igrr! I only had half the CONFIG_ options, so that gives me some more to play with, and the info about how to change the load map is also very helpful!

I'm running into trouble moving MicroPython to esp-idf v4.2 because IRAM usage has shot through the roof, it seems. Compiled with the same options it's 20k over iram0_0_seg. Questions: - if I set CONFIG_FREERTOS_UNICORE=y is there a way to get the 32KB of core 1's cache added to iram0_0_seg? - Is th...

Has anything leaked about the C2 and S4? I had thought I had seen something about the C2, but now I can't find it. Prob got confused in all this nomenclature!

Thanks for the response! I a bit confused by this: In particular, RSA-based ciphersuite verification (with hardware MPI acceleration) is much faster in recent versions of ESP-IDF, and significantly faster than DHE / ECDHE Did you perhaps mean RSA vs. DSS / ECDSA? I'm looking at cipher suites with pe...

When I connect to a server using TLS, the connection can block for close to a full second depending on the cipher suite used. Currently, as far as I can tell, the app calls pretty directly into mbedtls, which means that the crypto all happens on the app core. Is there an easy way to move the crypto ...

Memory fragmentation? The stack has to be contiguous and there may not be any contiguous chunk of that size.

Any suggestions for where to find an answer?

After spending a couple of days banging my head against auto-light-sleep I wish the next round of chips have a bit more thought put into low power operation. Specifically, I find the fact that most peripherals stop working properly in light sleep to be abysmal, the uart being the first issue that mu...