IO0是有电容的。最后结论是CHIP_PU （复位管脚）虽然有电容、由于3.3V上升的很慢、挂在CHIP_PU上的RC电路的延迟作用相对来说没有。
解决方式就是更改电源、让上3.3V升的时间更快。

谢谢ESP_LJH。

Thanks cruvus. That's just what I was looking for. I've correlated the problem with me not properly implementing "2.2.1 Poweron Sequence" from the hardware design guidelines. https://www.espressif.com/sites/default/files/documentation/esp32-s3_hardware_design_guidelines_en.pdf CHIP_PU must rise only...

The ROM bootloader prints a couple lines on boot: Build:Mar 27 2021 rst:0x1 (POWERON),boot:0x2b (SPI_FAST_FLASH_BOOT) I'm debugging a boot problem where the output of the boot:0x0x[0-9a-fA-F]* changes between 0x0 and 0x23. The accompanying text for both is identical: (DOWNLOAD(USB/UART0)). What is t...

由于另一个板子的电源变更、我3.3V先在上升的比以前缓慢、导致模块进入Download Boot模式、一直卡在那里。如果在这个时候我把CHIP_PU暂时拉底然后回复高、模块会正常的进入SPI Boot模式。 我参考的文档是： https://www.espressif.com/sites/default/files/documentation/esp32-s3_hardware_design_guidelines_cn.pdf 2.8 Strapping 管脚。 - ESP32-S3模块 - Strapping管脚都是在默认状态。 - CHIP_PU脚有一个10K拉高电阻和0.1uF电容接地。...

I used SystemView in IDF v4.4, managing to pull a trace via JTAG using openocd as described in the documentation: (https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/api-guides/app_trace.html#openocd-systemview-tracing-command-options). openocd and gdb were flaky and capturing traces was ...

Thanks @boarchuz, adding `-DCONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID` to the `build.extra_flags` in platform.txt was all I needed.

While this approach has provided some very useful information on tasks, it has also unfortunately broken part of the WiFi stack.

I managed to make this work with the following steps: [*]run git log in arduino-esp32 to find the latest tagged IDF (3.1 in my case) [*]checkout that tag in esp-idf [*]copy sdkconfig from arduino-esp32/tools/sdk/sdkconfig to esp-idf/examples/get-started/blink/sdkconfig [*]run make menuconfig in esp-...